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74LVC541A 반도체 회로 부품 판매점

Octal buffer/line driver



Philips 로고
Philips
74LVC541A 데이터시트, 핀배열, 회로
INTEGRATED CIRCUITS
74LVC541A
Octal buffer/line driver with 5-volt tolerant
inputs/outputs (3-State)
Product specification
Supercedes data of 1997 Oct 27
IC24 Data Handbook
1998 Jul 29
Philips
Semiconductors


74LVC541A 데이터시트, 핀배열, 회로
Philips Semiconductors
Octal buffer/line driver with 5-volt tolerant
inputs/outputs (3-State)
Product specification
74LVC541A
FEATURES
5-volt tolerant inputs/outputs, for interfacing with 5-volt logic
Wide supply voltage range of 2.7V to 3.6V
Complies with JEDEC standard no. 8-1A
CMOS low power consumption
Direct interface with TTL levels
5 Volt tolerant inputs/outputs, for interfacing with 5 Volt logic
DESCRIPTION
The 74LVC541A is a high performance, low-power, low-voltage
Si-gate CMOS device and superior to most advanced CMOS
compatible TTL families.
Inputs can be driven from either 3.3V or 5.0V devices. In 3-State
operation, outputs can handle 5V. This feature allows the use of
these devices as translators in a mixed 3.3V/5V environment.
The 74LVC541A is an octal non-inverting buffer/line driver with
5-volt tolerant inputs/outputs. The 3-State outputs are controlled by
the output enable inputs OE1 and OE2.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25°C; tr = tf 2.5 ns
SYMBOL
PARAMETER
CONDITIONS
tPHL/tPLH
Propagation delay
An to Yn
CL = 50 pF;
VCC = 3.3 V
CI Input capacitance
CPD Power dissipation capacitance per buffer Notes 1 and 2
NOTES:
1. CPD is used to determine the dynamic power dissipation (PD in µW)
PD = CPD × VCC2 × fi (CL × VCC2 × fo) where:
fi = input frequency in MHz; CL = output load capacitance in pF;
fo = output frequency in MHz; VCC = supply voltage in V;
ȍ (CL × VCC2 × fo) = sum of the outputs.
2. The condition is VI = GND to VCC
TYPICAL
3.3
5.0
20
ORDERING INFORMATION
PACKAGES
20-Pin Plastic SO
20-Pin Plastic SSOP Type II
20-Pin Plastic TSSOP Type I
TEMPERATURE RANGE OUTSIDE NORTH AMERICA
–40°C to +85°C
74LVC541A D
–40°C to +85°C
–40°C to +85°C
74LVC541A DB
74LVC541A PW
NORTH AMERICA
74LVC541A D
74LVC541A DB
7LVC541APW DH
UNIT
ns
pF
pF
PKG. DWG. #
SOT163-1
SOT339-1
SOT360-1
PIN DESCRIPTION
PIN NUMBER SYMBOL
1, 19
OE1, OE2
2, 3, 4, 5,
6, 7, 8, 9
10
18, 17, 16, 15,
14, 13, 12, 11
20
A0 to A7
GND
Y0 to Y7
VCC
NAME AND FUNCTION
Output enable inputs
(active LOW)
Data inputs
Ground (0 V)
Bus outputs
Positive supply voltage
FUNCTION TABLE
INPUTS
OE1
INPUTS
OE2
An
LLL
L LH
XHX
HXX
H = HIGH voltage level
L = LOW voltage level
X = don’t care
Z = high impedance OFF-state
OUTPUT
Yn
L
H
Z
Z
1998 Jul 29
2 853-2103 19803




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74LVC541A driver

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