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PDF TM057KDH01 Data sheet ( Hoja de datos )
| Número de pieza | TM057KDH01 | |
| Descripción | Display Module | |
| Fabricantes | Tianma | |
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SHANGHAI TIANMA MICRO-ELECTRONICS
2. Input/Output Terminals
TM057KDH01 V2.0
2.1 CN1 pin assignment (Signal interface)
Connector type: 089H33-000100-G2-R (STARCONN)
No Symbol I/O
Description
Comment
1
GND
P Ground
2 DOTCLK I Dot clock. Latch data at falling edge of DOTCLK.
3
Hsync
I
Horizontal sync signal in SYNC mode.
Pull low or floating in DE mode.
4
Vsync
I
Vertical sync signal in SYNC mode.
Pull low or floating in DE mode.
5
GND
P Ground
6 R0 I Red data (LSB)
7 R1 I Red data
8 R2 I Red data
9 R3 I Red data
10 R4 I Red data
11 R5 I Red data (MSB)
12 GND P Ground
13 G0 I Green data(LSB)
14 G1 I Green data
15 G2 I Green data
16 G3 I Green data
17 G4 I Green data
18 G5 I Green data(MSB)
19 GND P Ground
20 B0 I Blue data(LSB)
21 B1 I Blue data
22 B2 I Blue data
23 B3 I Blue data
24 B4 I Blue data
25 B5 I Blue data(MSB)
26 GND P Ground
27
ENABLE
I
Data enable signal in DE mode.
This pin must pull high in SYNC mode.
28 VCC P Power supply
29 VCC P Power supply
30
R/L
I
Set horizontal scan direction:
Low/NC: left to right; High: right to left
31
U/D
I
Set vertical scan direction:
High/NC: up to down; Low: down to up
32 NC - No connection
33 GND P Ground
Note1: I/O definition:
I----Input O----Output P----Power/Ground
Note2: CN1 Matching FPC type: 33 pin, pitch: 0.5mm, height: 0.3mm.
The information contained herein is the exclusive property of SHANGHAI TIANMA MICRO-ELECTRONICS
Corporation, and shall not be distributed, reproduced, or disclosed in whole or in part without prior written
permission of SHANGHAI TIANMA MICRO-ELECTRONICS Corporation.
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SHANGHAI TIANMA MICRO-ELECTRONICS
5.4 AC input characteristics
TM057KDH01 V2.0
(VCC=3.3V, GND=0V, Ta=25℃)
Parameter
Symbol Min Typ Max Unit
Conditions
DOTCLK pulse duty
Tcwh 40% 50% 60% Tclk Tcph is DCLK cycle
VSYNC setup time
Tvst 10 -
- ns
VSYNC hold time
Tvhd 10
-
- ns
HSYNC setup time
Thst 10 -
- ns
HSYNC hold time
Thhd 10
-
- ns
Data setup time
Tdsu 10
-
- ns Rn, Gn, Bn to DCLK
Data hold time
Tdhd 10
-
- ns Rn, Gn, Bn to DCLK
Enable setup time
Tesu 10
ns
Table 5.4 AC input characteristics
Tcph
DOTCLK
DATA
ENABLE
DOTCLK
VSYNC
HSYNC
Figure 5.4 AC input characteristics
The information contained herein is the exclusive property of SHANGHAI TIANMA MICRO-ELECTRONICS
Corporation, and shall not be distributed, reproduced, or disclosed in whole or in part without prior written
permission of SHANGHAI TIANMA MICRO-ELECTRONICS Corporation.
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