AD100-8-TO52-S1 반도체 회로 부품 판매점
Photodiode
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 Pacific Silicon Sensor |
Pacific Silicon Sensor Series 8 Data Sheet
Part Description AD100-8-TO52-S1
Order # 06-035
ACTIVE AREA: 0.00785 mm 2
(100 µm DIA)
Ø 5.40
Ø 3.00 116°
VIEWING
Ø 4.70
ANGLE
PIN 1
CATHODE
Ø0.46
3 PL
Ø 2.54
PIN CIRCLE
FRONTSIDE VIEW
2.70
3.60
±1
12.7
3 PL
PIN 4
CASE
PIN 3
ANODE
BACKSIDE VIEW
FEATURES
• ∅ 100 µm active area
• High gain at low bias voltage
• Fast rise time
• Low capacitance
DESCRIPTION
0.00785 mm2 High Speed, High Gain Avalanche
Photodiode with N on P construction. Hermetically
packaged in a TO-52-S1 with a clear borosilicate glass
window cap.
APPLICATIONS
• High speed optical
communications
• Laser range finder
• Medical equipment
• High speed photometry
S
ABSOLUTE MAXIMUM RATING
SYMBOL PARAMETER MIN
TSTG
TOP
TSOLDERING
Storage Temp
Operating Temp
Soldering Temp
10 seconds
-55
-40
Electrical Power
Dissipation @ 22°C
-
Optical Peak Value,
once for 1 second
-
IPH (DC)
Continuous Optical
Operation
-
IPH (AC)
Pulsed Signal Input
50 µs “on” / 1 ms “off”
-
MAX
+125
+100
+260
100
200
250
1
UNITS
°C
°C
°C
mW
mW
µA
mA
SPECTRAL RESPONSE at M = 100
60
50
40
30
20
10
0
400 500 600 700 800 900 1000 1100
WAVELENGTH (nm)
C
ELECTRO-OPTICAL CHARACTERISTICS @ 22 °C
SYMBOL
CHARACTERISTIC
TEST CONDITIONS
MIN TYP MAX UNITS
ID Dark Current
M = 100*
C Capacitance
M = 100*
VBR Breakdown Voltage
ID = 2 µA
Temperature Coefficient of VBR
Responsivity
M = 100; = 0 V; λ = 800 nm
--- 50 100 pA
--- 0.8 --- pF
120 190 --- V
0.35 0.45 0.55 V/K
45 50 --- A/W
∆ƒ3dB
Bandwidth
-3dB
2 --- --- GHz
tr Rise Time
Optimum Gain
--- --- 180 ps
50 60 ---
“Excess Noise” factor
M = 100
--- 2.2 ---
“Excess Noise” index
Noise Current
M = 100
M = 100
--- 0.2 ---
--- 0.15 --- pA/Hz1/2
Max Gain
200 --- ---
NEP
Noise Equivalent Power
M = 100; λ = 880 nm
---
3.0 X 10-15
--- W/Hz1/2
* Measurement conditions: Setup of photo current 50 pA at M = 1 and irradiated by a 680 nm, 60 nm bandwidth LED. Increase the photo
current up to 5.0 nA, (M = 100) by internal multiplication due to an increasing bias voltage.
8/23/2010
Page 1 of 2
Disclaimer: Due to our policy of continued development, specifications are subject to change without notice.
TYPICAL GAIN vs BIAS VOLTAGE
QUANTUM EFFICIENCY for M = 1
10000
1000
100
10
1
1 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150
BIAS VOLTAGE (V)
1.00
0.90
0.80
0.70
0.60
0.50
0.40
0.30
0.20
0.10
0.00
400 480 560 640 720 800 880 960 1040
WAVELENGTH (nm)
DEVICE SCHEMATIC
PIN 1
PIN 4
PIN 3
SUGGESTED CIRCUIT SCHEMATIC
BIAS SUPPLY VOLTAGE
CURRENT LIMITING RESISTOR
APD
MIN. 0.1 µF CAPACITOR
CLOSEST TO APD
DIODE, PROTECTIVE CIRCUIT
READ-OUT CIRCUIT OR
50 Ohm LOAD RESISTANCE
APPLICATION NOTES
• Current should be limited by a protecting resistor or current limiting IC inside the power supply.
• Use of low noise read-out IC.
• For high gain applications (M>50) bias voltage should be temperature compensated.
• For low light level applications, blocking of ambient light should be used.
HANDLING PRECAUTIONS:
• Soldering temperature - 260°C for 10 seconds max. The device must be protected against solder flux vapor.
• Minimum pin length - 2 mm
• ESD protection - Standard precautionary measures are sufficient.
• Storage - Store devices in conductive foam.
• Avoid skin contact with window.
• Clean window with Ethyl alcohol if necessary.
• Do not scratch or abrade window.
USA:
Pacific Silicon Sensor, Inc.
5700 Corsa Avenue, #105
Westlake Village, CA 91362 USA
Phone (818) 706-3400
Fax (818) 889-7053
Email: [email protected]
www.pacific-sensor.com
Proud Members of the Silicon Sensor International AG Group of companies
8/23/2010
International sales:
Silicon Sensor International AG
Peter-Behrens-Str. 15
D-12459 Berlin, Germany
Phone +49 (0)30-63 99 23 10
Fax +49 (0)30-63 99 23 33
Email: [email protected]
www.silicon-sensor.de
Page 2 of 2
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AD100-8-TO52-S1 diode
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