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Intel |
Intel® MD516 NAND Flash Memory
JS29F16G08AAMC1, JS29F32G08CAMC1, JS29F64G08FAMC1
Product Features
Advance Datasheet
Open NAND Flash Interface (ONFI) 1.0
Compliant
Multilevel cell (MLC) technology
Organization:
— Page size: 4,314 bytes (4,096 + 218 bytes)
— Block size: 128 pages (512K + 27K bytes)
— Plane size: 2,048 blocks
— Device size: 16Gb: 4,096 blocks; 32Gb:
8,192 blocks; 64Gb: 16,384 blocks
Read performance
— Random read: 50µs
— Sequential read: 20ns
Write performance
— Page program: 900µs (TYP)
— Block erase: 2ms (TYP)
Endurance:
— 5,000 PROGRAM/ERASE cycles
— Data Retention: JEDEC compliant
Operating Temperature
— Commercial: 0 to +70 °C
— Extended: -40 to +85 °C
Core Voltage (VCC): 2.7V - 3.6V
First block (block address 00h) guaranteed to
be valid when shipped from factory
Industry-standard basic NAND Flash command
set
Advanced command set:
— PROGRAM PAGE CACHE MODE
— PAGE READ CACHE MODE
— One-time programmable (OTP) commands
— Two-plane commands
— Interleaved die operations
— READ UNIQUE ID (contact factory)
— READ ID2 (contact factory)
Operation status byte provides a software
method of detecting:
— Operation completion
— Pass/fail condition
— Write-protect status
Ready/busy# (R/B#) signal provides a
hardware method of detecting PROGRAM or
ERASE cycle completion
WP# signal: Entire device hardware write
protect
Staggered Power-up Sequence: Issue RESET
command (FFH)
INTERNAL DATA MOVE operations supported
within the plane from which data is read
Package: 48 TSOP, Type I (Lead-Free Plating)
Intel Confidential
Document Number: 316339-001US
March 2007
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Intel® MD516 NAND Flash Memory
Advance Information DS
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Intel Confidential
March 2007
Document Number: 316339-001US
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