PDF M93S66-W Data sheet ( Hoja de datos )

Número de pieza	M93S66-W
Descripción	MICROWIRE bus EEPROM
Fabricantes	STMicroelectronics
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Hay una vista previa y un enlace de descarga de M93S66-W (archivo pdf) en la parte inferior de esta página. Total 30 Páginas
No Preview Available ! M93S46-W M93S56-W M93S66W 4 Kbit, 2 Kbit and 1 Kbit serial MICROWIRE bus EEPROM with write protection Datasheet - production data PDIP8 (BN) TSSOP8 (DW) 169 mil width SO8 (MN) 150 mil width MSv35377V1 Features • Compatible with MICROWIRE bus serial interface • Memory array − 1 Kbit, 2 Kbit or 4 Kbit of EEPROM − Organized by word (16b) − Page = 4 words • Write − Byte write within 5 ms − Page write within 5 ms − Ready/busy signal during programming • User defined write protected area • High-speed clock: 2 MHz • Single supply voltage: − 2.5 V to 5.5 V • Operating temperature range: • -40 °C up to +85 °C. • Enhanced ESD protection • More than 4 million write cycles • More than 200-year data retention Packages • PDIP8 ECOPACK®1 • TSSOP8 ECOPACK®2 • SO8 ECOPACK®2 January 2015 DocID5124 Rev 7 This is information on a product in full production 1/32 www.st.com 1 page M93S46-W M93S56-W M93S66W Description 1 Description The M93S46, M93S56, M93S66 devices are Electrically Erasable PROgrammable Memories (EEPROMs) organized as 64, 128 or 256 words (one word is 16 bits), accessed through the MICROWIRE bus. The M93S46, M93S56, M93S66 can operate with a supply voltage from 2.5 V to 5.5 V over an ambient temperature range of -40 °C / +85 °C. Figure 1: Logic diagram VCC D C S PRE W M93Sx6 Q VSS AI02020B Figure 2: 8-pin package connections M93Sx6 S1 C2 D3 Q4 8 VCC 7 PRE 6W 5 VSS AI02021B 1. See Section 9: "Package mechanical data" for package dimensions, and how to identify pin-1. Signal name Table 1: Signal names Function S Chip select input D Serial data input Q Serial data output C Serial clock PRE Protection register enable W Write enable VCC Supply voltage VSS Ground DocID5124 Rev 7 5/32 5 Page M93S46-W M93S56-W M93S66W Instruction Description W PRE Start bit Op- code Address (1) Data PRCLEAR Protection Register Clear 1 1 1 11 111111 PREN PRDS Protection Register Enable Protection Register Disable 1 1 1 00 11XXXX 1 1 1 00 000000 - - - Note: (1)X = Don’t Care bit. Required clock cycles 9 Instructions Additional comments Protect Flag is also cleared (cleared Flag = 1) 9- 9 OTP bit is set permanently Instruction Description READ Read Data from Memory WRITE Write Data to Memory PAWRITE Page Write to Memory WRAL WEN WDS Write All Memory with same Data Write Enable Write Disable PRREAD Protection Register Read PRWRITE Protection Register Write PRCLEAR Protection Register Clear Table 3: Instruction set for the M93S66, M93S56 Start Op- W PRE bit code Address (1)(2) Data Required clock cycles X 0 1 10 A7A0 Q15Q0 - 1 0 1 01 A7A0 D15D0 27 1 0 1 11 A7A0 N x 11 + N x D15D0 16 1 0 1 00 01XXXXXX D15D0 10 X0 1 00 11XXXXXX 1 00 00XXXXXX - - Q7Q0 X 1 1 10 XXXXXXXX + Flag 27 11 11 - 1 1 1 01 A7A0 - 11 1 1 1 11 11111111 - 11 Additional comments - Write is executed if the address is not inside the Protected area Write is executed if all the N addresses are not inside the Protected area Write all data if the Protection Register is cleared - - Data Output = Protection Register content + Protection Flag bit Data above specified address A7-A0 are protected Protect Flag is also cleared (cleared Flag = 1) DocID5124 Rev 7 11/32 11 Page

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