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PDF M24M02-DR Data sheet ( Hoja de datos )
| Número de pieza | M24M02-DR | |
| Descripción | 2-Mbit serial I2C bus EEPROM | |
| Fabricantes | STMicroelectronics | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de M24M02-DR (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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SO8 (MN)
150 mil width
WLCSP
M24M02-DR
2-Mbit serial I²C bus EEPROM
Datasheet - production data
Features
• Compatible with all I2C bus modes:
– 1 MHz
– 400 kHz
– 100 kHz
• Memory array:
– 2 Mbit (256 Kbyte) of EEPROM
– Page size: 256 byte
– Additional Write lockable page
• Single supply voltage:
– 1.8 V to 5.5 V over –40 °C / +85 °C
• Write:
– Byte Write within 10 ms
– Page Write within 10 ms
• Random and sequential Read modes
• Write protect of the whole memory array
• Enhanced ESD/Latch-Up protection
• More than 4 million Write cycles
• More than 200-years data retention
Packages
• SO8 ECOPACK2®
• WLCSP ECOPACK2®
July 2015
This is information on a product in full production.
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1 page  
M24M02-DR
List of figures
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
SO8 connections, top view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
WLCSP connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Chip enable inputs connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
I2C bus protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Write mode sequences with WC = 0 (data write enabled) . . . . . . . . . . . . . . . . . . . . . . . . . 15
Write mode sequences with WC = 1 (data write inhibited) . . . . . . . . . . . . . . . . . . . . . . . . . 16
Write cycle polling flowchart using ACK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Read mode sequences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
AC measurement I/O waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Maximum Rbus value versus bus parasitic capacitance (Cbus) for
an I2C bus at maximum frequency fC = 400 kHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
aMnaIx2imC ubmusRabtums vaaxliumeuvmerfsreuqsubeunscypafCra=si1ticMcHazpa. c. i.ta.n.c.e.
Cbus)
.....
for
...
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29
AC waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
SO8N – 8-lead plastic small outline, 150 mils body width, package outline . . . . . . . . . . . . 31
SO8N – 8-lead plastic small outline, 150 mils body width,
package recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
WLCSP- 8-bump, 3.556 x 2.011 mm, wafer level chip scale
package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
WLCSP- 8-bump, 3.556 x 2.011 mm, wafer level chip scale
package recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
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M24M02-DR
4 Device operation
Device operation
The device supports the I2C protocol. This is summarized in Figure 6. Any device that sends
data on to the bus is defined to be a transmitter, and any device that reads the data to be a
receiver. The device that controls the data transfer is known as the bus master, and the
other as the slave device. A data transfer can only be initiated by the bus master, which will
also provide the serial clock for synchronization. The device is always a slave in all
communications.
Figure 6. I2C bus protocol
3#,
3$!
34!24
#ONDITION
3$!
)NPUT
3$!
#HANGE
34/0
#ONDITION
3#,
3$!
-3"
34!24
#ONDITION
3#,
3$!
-3"
!#+
!#+
34/0
#ONDITION
!)"
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| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet M24M02-DR.PDF ] | |
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