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Intersil |
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Data Sheet
X9315
Low Noise, Low Power, 32 Taps
December 21, 2009
FN8179.2
Digitally Controlled Potentiometer
(XDCP™)
The Intersil X9315 is a digitally controlled potentiometer
(XDCP). The device consists of a resistor array, wiper
switches, a control section, and nonvolatile memory. The
wiper position is controlled by a 3-wire interface.
The potentiometer is implemented by a resistor array
composed of 31 resistive elements and a wiper switching
network. Between each element and at either end are tap
points accessible to the wiper terminal. The position of the
wiper element is controlled by the CS, U/D, and INC inputs.
The position of the wiper can be stored in nonvolatile
memory and then be recalled upon a subsequent power-up
operation.
The device can be used as a three-terminal potentiometer or
as a two-terminal variable resistor in a wide variety of
applications including:
• Control
• Parameter Adjustments
• Signal Processing
Block Diagram
Features
• Solid-state potentiometer
• 3-wire serial interface
• 32 wiper tap points
- Wiper position stored in nonvolatile memory and
recalled on power-up
• 31 resistive elements
- Temperature compensated
- End to end resistance range ± 20%
- Terminal voltage, 0 to VCC
• Low power CMOS
- VCC = 2.7V or 5V
- Active current, 80/400µA max.
- Standby current, 5µA max.
• High reliability
- Endurance, 100,000 data changes per bit
- Register data retention, 100 years
• RTOTAL values = 10kΩ, 50kΩ, 100kΩ
• Packages
- 8 Ld SOIC, MSOP and PDIP
• Pb-free available (RoHS compliant)
VCC (Supply Voltage)
Up/Down
(U/D)
Increment
(INC)
Device Select
(CS)
Control
and
Memory
VSS (Ground)
General
U/D
INC
CS
RH/VH
RW/VW
RL/VL
VVCSSC
5-Bit
Up/Down
Counter
5-Bit
Nonvolatile
Memory
Store and
Recall
Control
Circuitry
31
30
29
28
One
of
Thirty
Two
Decoder
2
1
0
Transfer
Gates
Resistor
Array
Detailed
RH/VH
RL/VL
RW/VW
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005, 2009. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
X9315
Ordering Information
PART NUMBER
PART MARKING
X9315WMZ (Note 2)
DDT
X9315WMZT1 (Notes 1, 2)
DDT
X9315WMIT2 (Note 1)
AAX
X9315WMIZ (Note 2)
AKW
X9315WMIZT1 (Notes 1, 2)
AKW
X9315WP
X9315WP
X9315WST1 (Note 1)
X9315W
X9315WSZ (Note 2)
X9315W Z
X9315WSZT1 (Notes 1, 2)
X9315W Z
X9315WSI
X9315W I
X9315WSIT1 (Note 1)
X9315W I
X9315WSIZ (Note 2)
X9315W ZI
X9315WSIZT1 (Notes 1, 2)
X9315W ZI
X9315UMZ (Note 2)
DDS
X9315UMZT1 (Notes 1, 2)
DDS
X9315UMI
AEB
X9315UMIT1 (Notes 1, 2)
AEB
X9315UMIZ (Note 2)
DDR
X9315UMIZT1 (Notes 1, 2)
DDR
X9315UST2 (Note 1)
X9315U
X9315USZ (Note 2)
X9315U Z
X9315USZT1 (Notes 1, 2)
X9315U Z
X9315USIZ (Note 2)
X9315U ZI
X9315USIZT1 (Notes 1, 2)
X9315U ZI
X9315TMZ (Note 2)
DDN
X9315TMZT1 (Notes 1, 2)
DDN
X9315TMIZ (Note 2)
DDL
X9315TMIZT1 (Notes 1, 2)
DDL
X9315TSZ (Note 2)
X9315T Z
X9315TSZT1 (Notes 1, 2)
X9315T Z
X9315TSIZ (Note 2)
X9315T ZI
X9315TSIZT1 (Notes 1, 2)
X9315T ZI
X9315WMZ-2.7 (Note 2)
AOI
X9315WMZ-2.7T1 (Notes 1, 2) AOI
X9315WMI-2.7T2 (Note 1)
AAV
X9315WMIZ-2.7 (Note 2)
AKX
X9315WMIZ-2.7T1 (Notes 1, 2) AKX
X9315WS-2.7
X9315W F
VCC LIMITS
(V)
5 ±10%
2.7 to 5.5
RTOTAL
(kΩ)
10
50
100
10
TEMP RANGE
(°C)
PACKAGE
PKG.
DWG. #
0 to 70 8 Ld MSOP (Pb-free) M8.118
0 to 70 8 Ld MSOP (Pb-free) M8.118
-40 to 85 8 Ld MSOP
M8.118
-40 to 85 8 Ld MSOP (Pb-free) M8.118
-40 to 85 8 Ld MSOP (Pb-free) M8.118
0 to 70 8 Ld PDIP
MDP0031
0 to 70 8 Ld SOIC
M8.15E
0 to 70 8 Ld SOIC (Pb-free) M8.15
0 to 70 8 Ld SOIC (Pb-free) M8.15
-40 to 85 8 Ld SOIC
M8.15E
-40 to 85 8 Ld SOIC
M8.15E
-40 to 85 8 Ld SOIC (Pb-free) M8.15
-40 to 85 8 Ld SOIC (Pb-free) M8.15
0 to 70 8 Ld MSOP (Pb-free) M8.118
0 to 70 8 Ld MSOP (Pb-free) M8.118
-40 to 85 8 Ld MSOP
M8.118
-40 to 85 8 Ld MSOP
M8.118
-40 to 85 8 Ld MSOP (Pb-free) M8.118
-40 to 85 8 Ld MSOP (Pb-free) M8.118
0 to 70 8 Ld SOIC
M8.15E
0 to 70 8 Ld SOIC (Pb-free) M8.15
0 to 70 8 Ld SOIC (Pb-free) M8.15
-40 to 85 8 Ld SOIC (Pb-free) M8.15
-40 to 85 8 Ld SOIC (Pb-free) M8.15
0 to 70 8 Ld MSOP (Pb-free) M8.118
0 to 70 8 Ld MSOP (Pb-free) M8.118
-40 to 85 8 Ld MSOP (Pb-free) M8.118
-40 to 85 8 Ld MSOP (Pb-free) M8.118
0 to 70 8 Ld SOIC (Pb-free) M8.15
0 to 70 8 Ld SOIC (Pb-free) M8.15
-40 to 85 8 Ld SOIC (Pb-free) M8.15
-40 to 85 8 Ld SOIC (Pb-free) M8.15
0 to 70 8 Ld MSOP (Pb-free) M8.118
0 to 70 8 Ld MSOP (Pb-free) M8.118
-40 to 85 8 Ld MSOP
M8.118
-40 to 85 8 Ld MSOP (Pb-free) M8.118
-40 to 85 8 Ld MSOP (Pb-free) M8.118
0 to 70 8 Ld SOIC
M8.15E
2 FN8179.2
December 21, 2009
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