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PDF A31S Data sheet ( Hoja de datos )

Número de pieza A31S
Descripción quad-core phablet processor
Fabricantes Allwinner Technology 
Logotipo Allwinner Technology Logotipo



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A31s
Datasheet
Revision 1.4
Feb 14, 2014
Copyright © 2014 Allwinner Technology. All Rights Reserved.

1 page




A31S pdf
1 OVERVIEW
The Allwinner A31s processor is a quad-core phablet processor designed for the phablet market. The phablet
is a product category that combines the functionalities of a smartphone with that of a tablet, and its size
usually falls somewhere in between a smartphone and a tablet.
The A31s processor is based on quad-core Cortex-A7 CPU, which is the most power efficient processor
developed by ARM. It also comes with SGX544MP2 GPU with eight logic core to enable powerful 3D
computing capability as well as excellent UI experience, especially when it comes to the smoothness of
screens with large size.
More importantly, A31s processor integrates a robust Audio Codec that includes two sets of I2S/PCM
interface for Baseband and Bluetooth, two integrated differential analog MIC for headset and phone, as well
as a digital MIC. It is capable of 3G, 2G, LTE, WiFi, Bluetooth, FM, GPS, AGPS, NFC and other voice and
data wireless transmission technology with a minimum of external components.
Additionally, A31s processor provides a wide range of peripheral interfaces. For example, it integrates display
interfaces such as HDMI, RGB LCD and LVDS, image input interfaces such as CSI, and data interfaces such
as USB DRD, USB EHCI/OHCI, SDC, SPI, UART, etc.
When it comes to power efficiency, AXP221s is specially designed for the power optimization of A31s. A31s
processor also supports a smart Power Consumption Management System to dynamically adjust CPU
frequency and voltage, supports DRAM Dynamic Frequency Scaling technology to dynamically adjust DRAM
frequency based on bandwidth requirements, and also supports Super Standby Mode to lower the system
power consumption during system standby.
A31s Datasheet (Revision 1.4)
Copyright © 2014 Allwinner Technology. All Rights Reserved.
Page 5

5 Page





A31S arduino
4 PIN DESCRIPTION
4.1. PIN CHARACTERISTICS
Following table describes the A31s pin characteristics.
Notes
1) Pin Name defines the names of pins. Note that a group of pins with similar meaning may be expressed in the form of [x:0];
2) Default Function defines the default function of each pin;
3) Type defines the signal direction: I (Input), O (Output), I/O(Input / Output), A (Analog), P (Power), G (Ground);
4) Default IO State defines the default IO state of each pin: DIS means disable;
5) Default Pull Up/Down defines the presence of an internal pull up or pull down resister. Unless otherwise specified, the pin
is default to be floating, and can be configured as pull up or pull down; Note that the NMI and RESET pins require no
additional pull-up resistors;
6) Buffer Strength defines drive strength of the associated output buffer. It is tested in the condition that VCC= 3.3V,
strength=MAX;
7) P[A:M] in Table 5-1 stands for GPIO [A:M]. For detailed auxiliary functions of each GPIO, please go to Section 5.2 GPIO
Multiplexing Functions section.
Ball#
Pin Name1
DRAM
Y9,Y6,AA8,AA6,AA9,Y7
,AB8,AB6,AA4,AA1,AB5
,AA2,AA5,AB1,Y5,AB2,
T2,N2,P3,P1,R3,N3,U1,
P2,M1,J2,L3,K2,M2,J1,
M3,K3
AA7,AA3,R1,L1,
Y8,AB3,R2,L2
AB9,Y4,P4,L4
V3
W3
Y3,T5
V4,W8,Y2,W6,V10,U5,Y
1,V8,W2,V9,V2,W9,T3,
R5,W4,U3
V1
N5
L5
N4,R4
T4,V5,U2
M5,M4
U4
K4
SDQ[31:0]
SDQS[3:0]
SDQSB[3:0]
SDQM[3:0]
SCK
SCKB
SCKE[1:0]
SA[15:0]
SWE
SCAS
SRAS
SCS[1:0]
SBA[2:0]
SODT[1:0]
SRST
SZQ
Default
Function2
DRAM
DRAM
DRAM
DRAM
DRAM
DRAM
DRAM
DRAM
DRAM
DRAM
DRAM
DRAM
DRAM
DRAM
DRAM
DRAM
Type3
Default
IO State4
Default
Buffer
Pull Up/Down5 Strength6 (mA)
Power Supply
I/O DIS
I/O DIS
I/O DIS
O DIS
O DIS
O DIS
O DIS
O DIS
O DIS
O DIS
O DIS
O DIS
O DIS
O DIS
O DIS
A-
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
-
-
-
-
-
-
-
- VCC_DRAM
-
-
-
-
-
-
-
-
-
A31s Datasheet (Revision 1.4)
Copyright © 2014 Allwinner Technology. All Rights Reserved.
Page 11

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