파트넘버.co.kr PL663-08 데이터시트 PDF


PL663-08 반도체 회로 부품 판매점

Analog Frequency Multiplier



Micrel 로고
Micrel
PL663-08 데이터시트, 핀배열, 회로
Analog Frequency Multiplier
PL663-xx XO Families
DESCRIPTION
Analog Frequency Multipliers TM (AFMs) are the
industry’s first “Balanced Oscillatorutilizing analog
multiplication of the fundamental frequency (at
double or quadruple frequency), combined with an
attenuation of the fundamental of the reference
crystal, without using a phase-locked loop (PLL), in
CMOS technology.
Patent pending PL663-xx family of AFM products
can achieve up to 800 MHz differential LVPECL,
LVDS, or single-ended LVCMOS output with little
jitter or phase noise deterioration.
PL663-xx family of products utilizes a low-power
CMOS technology and is housed in GREEN/ RoHS
compliant 16-pin TSSOP and 3x3 QFN packages.
FEATURES
Non-PLL frequency multiplication
Input frequency from 30-200 MHz
Output frequency from 60-800 MHz
Low phase noise and jitter (equivalent to fundamental
at the output frequency)
Ultra-low jitter
o RMS phase jitter < 0.25 ps (12 kHz to 20 MHz)
o RMS period jitter < 2.5 ps typ.
Low phase noise
o -145 dBc/Hz @ 100 kHz offset from 155.52 MHz
o -150 dBc/Hz @ 10 MHz offset from 155.52 MHz
Low input frequency eliminates the need for expensive
crystals
Differential LVPECL/LVDS, or single-ended LVCMOS
output
Single 2.5V or 3.3V +/- 10% power supply
Optional industrial temperature range (-40C to
+85C)
Available in 16-pin GREEN/RoHS compliant TSSOP,
and 16-pin 3x3 QFN packages.
Figure 1: 2X AFM Phase Noise at 212.5 MHz (106.25 MHz 3rd overtone crystal)
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944-0800 • fax +1(408) 474-1000 • www.micrel.com Rev. 02/18/10 Page 1


PL663-08 데이터시트, 핀배열, 회로
Analog Frequency Multiplier
PL663-xx XO Families
L2X
XIN
R
XOUT
Oscillator
Amplifier
Only required in x4 designs
Frequency
X2
Frequency
X4
L4X
OE
QBAR
Q
Figure 2: Block Diagram of AFM XO
Figure 3 shows the period jitter histogram of the 2x Analog Frequency Multiplier at 212.5 MHz, while Figure 4
shows the very low levels of sub-harmonics that correspond to the exceptional performance (i.e. low jitter).
Figure 3: Period Jitter Histogram at 212.5MHz
Analog Frequency Multiplier (2x),
with 106.25 MHz crystal
Figure 4: Spectrum Analysis at 212.5MHz
Analog Frequency Multiplier (2x),
with sub-harmonics below 69dBc
OE LOGIC SELECTION
OUTPUT
OESEL
OE Output State
LVPECL
LVDS or LVCMOS
0 (Default)
1
0 (Default)
1
0 (Default)
1
0
1 (Default)
0
1 (Default)
0 (Default)
1
Enabled
Tri-state
Tri-state
Enabled
Tri-state
Enabled
Enabled
Tri-state
OESEL and OE: Connect to VDD to set to “1”, connect to GND to set to “0”. [The ‘Default’ state is set by internal pull up/down resistor.]
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944-0800 • fax +1(408) 474-1000 • www.micrel.com Rev. 02/18/10 Page 2




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