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Número de pieza | K20J60U | |
Descripción | TK20J60U | |
Fabricantes | Toshiba Semiconductor | |
Logotipo | ||
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TOSHIBA Field Effect Transistor Silicon N Channel MOS Type (DTMOS )
TK20J60U
Switching Regulator Applications
• Low drain-source ON resistance: RDS (ON) = 0.165 (typ.)
• High forward transfer admittance: ⎪Yfs⎪ = 12 S (typ.)
• Low leakage current: IDSS = 100 A (VDS = 600 V)
• Enhancement-mode: Vth = 3.0~5.0 V (VDS = 10 V, ID = 1 mA)
Absolute Maximum Ratings (Ta = 25°C)
Characteristics
Drain-source voltage
Gate-source voltage
Drain current
DC (Note 1)
Pulse (t = 1 ms)
(Note 1)
Drain power dissipation (Tc = 25°C)
Single pulse avalanche energy
(Note 2)
Avalanche current
(Note 3)
Repetitive avalanche energy
Channel temperature
Storage temperature range
Symbol
VDSS
VGSS
ID
IDP
PD
EAS
IAR
EAR
Tch
Tstg
Rating
600
±30
20
40
190
144
20
19
150
−55 to 150
Unit
V
V
A
W
mJ
A
mJ
°C
°C
15.9 MAX.
Unit: mm
3.2 ± 0.2
2.0 ± 0.3
1.0
0.3
0.25
5.45 ± 0.2
5.45 ± 0.2
123
1. Gate
2. Drain(heat sink)
3. Source
JEDEC
⎯
JEITA
SC-65
TOSHIBA
2-16C1B
Weight : 4.6 g (typ.)
Note:
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly
even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute
maximum ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor
Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability
data (i.e. reliability test report and estimated failure rate, etc).
Thermal Characteristics
Characteristics
Thermal resistance, channel to case
Thermal resistance, channel to ambient
Symbol
Rth (ch-c)
Rth (ch-a)
Max
0.658
50
Unit
°C/W
°C/W
2
Note 1: Please use devices on conditions that the channel temperature is below 150°C.
Note 2: VDD = 90 V, Tch = 25°C (initial), L = 0.63 mH, RG = 25 , IAR = 20 A
Note 3: Repetitive rating: pulse width limited by maximum channel temperature
This transistor is an electrostatic sensitive device. Please handle with caution.
1
3
1 2008-06-11
1 page TK20J60Uwww.DataSheet4U.com
rth – tw
10
1
Duty=0.5
0.2
0.1
0.1 0.05
Single pulse
0.01
0.02
0.01
10
100
1 10 100
Pulse width tw (s)
PDM
t
T
Duty = t/T
Rth (ch-c) = 0.658°C/W
1 10
Safe operating area
100
ID max (Pulse) *
ID max (Continuous)
10 1 ms *
100 µs *
DC operation
1 Tc = 25°C
0.1
* Single nonrepetitive
0.01
pulse Tc = 25°C
Curves must be derated
linearly with increase in
temperature.
0.001
0.1
1
10
VDSS max
100 1000
Drain−source voltage VDS (V)
EAS – Tch
200
160
120
80
40
0
25 50 75 100 125 150
Channel temperature (initial) Tch (°C)
15 V
−15 V
BVDSS
IAR
VDD
VDS
TEST CIRCUIT
WAVEFORM
RG = 25 Ω
VDD = 90 V, L = 0.63 mH
ΕAS
=
1
2
⋅L ⋅I2
⋅ ⎜⎜⎝⎛
BVDSS
BVDSS − VDD
⎟⎟⎠⎞
5 2008-06-11
5 Page |
Páginas | Total 6 Páginas | |
PDF Descargar | [ Datasheet K20J60U.PDF ] |
Número de pieza | Descripción | Fabricantes |
K20J60U | TK20J60U | Toshiba Semiconductor |
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