|
|
PDF STx5119 Data sheet ( Hoja de datos )
| Número de pieza | STx5119 | |
| Descripción | Low-cost interactive set-top box decoder | |
| Fabricantes | STMicroelectronics | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de STx5119 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
|
No Preview Available !
® STx5119
Low-cost interactive set-top box decoder
I Enhanced ST20 32-bit VL-RISC CPU
G 200 MHz, single cycle cache, 4 Kbyte instruction cache,
4 Kbyte data cache, 2 Kbyte SRAM
I Unified memory interface
G up to166 MHz,16-bit wide SDR SDRAM interface
I Programmable flash memory interface
G four separately configurable banks, 8/16-bits wide
G SRAM, peripheral, Flash, SFlash™ support
G support for low-cost DVB-CI
I Programmable transport interface (PTI)
G single transport stream input
G support for DVB transport streams
G integrated DVB, descrambler
I MPEG-2 MP@ML video decoder
G fully programmable horizontal and vertical SRCs
I Graphics/display
G blitter based display compositor
G 8 bpp CLUT graphics, 256 x 30 bits (AYCbCr) CLUT
entries. 16 bpp true color graphics, RGB565, ARGB1555
formats. Link-list control
G 2D paced blitter engine with fill function
ADVANCE DATASHEET
I PAL/NTSC/SECAM encoder
G RGB, CVBS, Y/C and YUV outputs with four 10-bit DAC
outputs. RGB/CVBS or YUV/CVBS or YC/CVBS.
G encoding of CGMS, Teletext, WSS, VPS, close caption
I Audio subsystem
G MPEG-1 layers I/II
G simultaneous MPEG audio decode on audio DACs and
output of Dolby streams on S/PDIF
G IEC958/IEC1937 digital audio output interface
G integrated stereo audio DAC system
I Central DMA controller
I On-chip peripherals
G two ASCs (UARTs) with Tx and Rx FIFOs
G three 8-bit banks of parallel I/O and one 7-bit bank
G one smartcard interface and clock generator
G two SSCs for I2C/SPI master/slave interfaces
G infrared transmitter/receiver
G integrated VCXO
G low-power / RTC / watchdog controller
I JTAG/TAP interface
I Package 24 mm x 24 mm LQFP216
Flash
peripherals
AudioL
AudioR
16
ST20 C1 core 200 MHz
DCU
2K SRAM
Int controller
4K ICache 4K DCache
Audio
Audio DACs
FMI decoder
PCM
player
S/PDIF
S/PDIF
player
Comms peripherals
16
UART (x 2)
IR Tx/Rx GPIO (x 4)
ILC SSCs (x 2)
Comms block
STm5118 interconnect
SDRAM
16
LMI
PTI Clock generation
Reset
System services
FDMA
MP@ML
Video decoder
2D graphics
blitter display
TV out
Video quad DACs
TSIN
Video output
RGB / YC / CVBS
December 2005
7939391A
STMicroelectronics Confidential
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
1 page  
STx5119
19.9 Reset control registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .152
19.10 CPU programmable interrupt register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .155
Chapter 20
20.1
20.2
20.3
20.4
20.5
20.6
20.7
Programmable transport interface (PTI) . . . . . . . . . . . . . . . . . . . . . . . . . . 156
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .156
PTI functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .157
PTI architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .158
PTI operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .160
Interrupt handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .163
DMA operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .164
Section filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .165
Chapter 21
21.1
21.2
21.3
21.4
Programmable transport interface (PTI) registers . . . . . . . . . . . . . . . . . . 173
DMA registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .174
Input interface registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .179
PTI configuration registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .182
Transport controller mode register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .185
Chapter 22
22.1
22.2
22.3
22.4
22.5
22.6
MPEG video decoder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 186
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .186
Main functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .186
Buffer organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .188
Video decoding tasks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .192
Video decoding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .195
Resets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .202
Chapter 23 MPEG video decoder registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 203
Chapter 24
24.1
24.2
24.3
24.4
24.5
24.6
2D blitter display engine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 213
2D blitter display engine functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .214
Recommended scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .215
Types of source queue . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .216
Decoding the source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .225
Clipping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .230
Color operations and conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .231
7939391A
STMicroelectronics Confidential
5/543
5 Page 
STx5119
1 Applications
Applications
The STx5119 is the latest in the family of Omega2 set-top box ICs providing a high performance,
low cost system on a chip for MPEG processing in cable, satellite or digital terrestrial STBs.
The STx5119 delivers enhanced performance with respect to previous generation devices. Main
memory is based upon a single 16-bit external SDRAM.
The display architecture of the device is based on a high performance blitter engine which
supports CLUT8 and RGB16 formats for video and OSD/graphics displays.
The STx5119 can be used for basic set-top boxes. A typical application is shown in Figure 1.
Figure 1: Free to air satellite
SDRAM
IR Tx/Rx
QPSK Rx
STV6000
Transport
stream in
STV0288
STx5119
RGB or
YC + CVBS
CVBS
VCR
Smart
Card
Flash
7939391A
STMicroelectronics Confidential
11/543
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet STx5119.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| STx5119 | Low-cost interactive set-top box decoder | STMicroelectronics |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |