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XL24C02 반도체 회로 부품 판매점

2048-Bit Serial Electrically Erasable PROM



Exel Microelectronics 로고
Exel Microelectronics
XL24C02 데이터시트, 핀배열, 회로
EXEL Microelectronics, Inc.
UINE
N
XL24C02
2,048-Bit Serial Electrically Erasable PROM
2.7 To 5.5 Volt Operation
FEATURES
• Low Power CMOS
— Active current less than 2mA
— Standby current less than 2µA
• Hardware Write Protection
— Write Control pin
• 2.7V to 5.5V Operation
• Extended Temperature Range: -40°C to +85°C
• Internally Organized as 256 x 8
• Two Wire Serial Interface (I2C™)
— Bidirectional data transfer protocol
• Four-Byte Page-Write Mode
— Minimizes total write time per byte
• Automatic Word Address Incrementing
— Sequential register read
• Self-Timed Write Cycle
• High Reliability
— Endurance: 100,000 erase/write cycles
— Data retention: 100 years
• 8-Pin PDIP or SOIC Packages
OVERVIEW
PIN CONFIGURATIONS
Plastic Dual-in-line
“P” Package
A0 1
A1 2
A2 3
VSS 4
8 VCC
7 WC
6 SCL
5 SDA
JEDEC Small Outline
“Y” Package
A0 1
A1 2
A2 3
VSS 4
8 VCC
7 WC
6 SCL
5 SDA
D0014 ILL A01.1
PIN NAMES
A0-A2
SDA
SCL
WC
VSS
VCC
Address Inputs
Serial Data I/O
Serial Clock Input
Write Control Input
Ground
Supply Voltage
The XL24C02 is a cost effective 2,048-bit serial E2PROM.
It is fabricated using EXEL’s advanced CMOS E2PROM
technology. This part operates from a single supply over
the range of 2.7 to 5.5 volts.
The XL24C02 is internally organized as a 256 x 8 memory
bank. It features a I2C serial interface and software
protocol allowing operation on a simple two-wire bus. Up
to eight XL24C02s may be connected to the 2-wire bus by
establishing their device address using the address input
pins (A0, A1 and A2).
PIN DESCRIPTIONS
Serial Data (SDA) - The SDA pin is a bidirectional pin
used to transfer data into and out of the device. Data may
change only when SCL is LOW, except START and STOP
conditions. It is an open-drain output, and may be wire-
ORed with any number of open-drain or open-collector
outputs.
Address (A0, A1 and A2) - The address inputs are used
to set the three bit device address of the XL24C02 which
will identify it on the two-wire bus. These inputs may be
tied HIGH or LOW, or they may be actively driven. These
inputs allow up to eight XL24C02 devices to be distin-
guished on the bus.
Serial Clock (SCL) - The SCL input is used to clock data
into and out of the device. In the WRITE mode, data must
remain stable when SCL is HIGH. In the READ mode,
data is clocked out on the falling edge of SCL.
Write Control (WC) - The Write Control input pin is used
to disable write circuitry to the memory. When HIGH, the
write function is disabled, protecting previously written
data; when LOW, the write function is enabled.
EXEL Microelectronics, Inc.
2150 Commerce Drive • San Jose, CA 95131
Phone 408 432-0500 • Fax 408 432-8710 • Internet www.exel.com
D0014 3/96
DVPTD 6931-05


XL24C02 데이터시트, 핀배열, 회로
UINE
N
XL24C02
BLOCK DIAGRAM
Vcc 8
SDA 5
SCL 6
WC 7
A2 3
A1 2
A0 1
Vss 4
Control
Logic
Slave Address
Register &
Comparator
Load
Inc.
Word Address
Counter
ACK
Clock
D I/O
High Voltage Gen.,
Timing and Control
64 x 32
Memory
Core
32
Y
Decoder
Data Register
D0014 ILL B01.1
ENDURANCE AND DATA RETENTION
The XL24C02 is designed for applications requiring up to
100,000 write cycles and unlimited read cycles. It pro-
vides 100 years of secure data retention, with or without
power applied, after the execution of 100,000 write
cycles.
APPLICATIONS
The XL24C02 is ideal for high volume applications requir-
ing low power and low density storage. This device uses
a cost effective, space-saving 8-pin plastic package.
Typical applications include robotics, alarm devices, elec-
tronic locks, meters and instrumentation.
CHARACTERISTICS OF THE I2C BUS
General Description
The I2C bus was designed for two-way, two-line serial
communication for different integrated circuits. The two
lines are: a serial data line (SDA), and a serial clock line
(SCL). The SDA line must be connected to a positive
supply by a pull-up resistor, located somewhere on the
bus (See Figure 1). Data transfer between devices may
be initiated with a START condition only when SCL and
SDA are HIGH (bus is not busy).
START and STOP Conditions
When both data and clock lines are HIGH, the bus is
known as “not busy.” A HIGH-to-LOW transition of the
data line, while the clock is HIGH, is defined as the
“START” condition. A LOW-to-HIGH transition of the data
line, while the clock is HIGH, is defined as the “STOP”
condition (See Figure 3).
DEVICE OPERATION
The XL24C02 is a 2,048-bit serial E2PROM. The device
supports the I2C bidirectional data transmission protocol.
The protocol defines any device that sends data onto the
bus as a “transmitter” and the receiving device as the
“receiver.” The device controlling the data transmission is
the “master,” and the controlled device is the “slave.” In all
cases, the XL24C02 will be a “slave” device, since it never
initiates any data transfers.
Up to eight XL24C02s can be connected to the bus,
selected by the A0, A1 and A2 device addresses. A0, A1
and A2 must be connected to either VCC, VSS or they may
be actively driven. Other devices may be connected to the
bus, but need a different device identification code.
Input Data Protocol
One data bit is transferred during each clock pulse. The
data on the SDA line must remain stable during the clock
HIGH time, because changes on the data line, while SCL
is HIGH will be interpreted as “START” or “STOP” condi-
tion (See Figure 2).
D0014 3/96
DVPTD 6931-05
2




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