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PDF RK3066 Data sheet ( Hoja de datos )
| Número de pieza | RK3066 | |
| Descripción | High Performance Processor | |
| Fabricantes | Rockchip | |
| Logotipo |  |
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RK3066 Datasheet brief
Rev1.0
RK3066 Datasheet brief
Revision 1.0
Feb. 2012
Rockchips Confidential
1
1 page  
RK3066 Datasheet brief
Rev1.0
64KB internal SRAM for security and non-security access, detailed size is
programmable
2KB internal SRAM shared with NandC
External off-chip memory①
DDR3/LVDDR3, 16/32bits data width, 2 ranks, 2GB(max) address space per rank
LPDDR, 32bits data width, 2 ranks, 2GB(max) address space per rank
LPDDR2, 32bits data width, 2 ranks, 2GB(max) address space per rank
Async SRAM/Nor Flash, 8/16bits data width,2banks,1MB(max) address space per
bank
Async Nand Flash(include LBA Nand), 8/16bits data width, 8 banks
Sync DDR Nand Flash , 8bits data width, 8 banks
1.2.3 Internal Memory
Internal BootRom
Size : 10KB
Support system boot from the following device :
8bits/16bits Async Nand Flash
SPI0 interface
eMMC interface
Support system code download by the following interface:
USB OTG
UART0 in CPU system
Internal SRAM
Size : 64KB
Support security and non-security access
512KB internal SRAM shared with L2 Cache for Cortex-A9
1.2.4 External Memory or Storage device
Dynamic Memory Interface (DDR3/LVDDR3/LPDDR/LPDDR2)
Compatible with JEDEC standard DDR3/LVDDR3/LPDDR/LPDDR2 SDRAM
Support up to 2 ranks (chip selects), maximum 2GB address space per rank
16bits/32bits data width is software programmable
Programmable timing parameters support DDR3/LPDDR/LPDDR2 SDRAM from
various vendor
Low power modes, such as power-down and self-refresh for DDR3/LVDDR3/
LPDDR/LPDDR2 SDRAM; clock stop and deep power-down for LPDDR/LVDDR3/
LPDDR2 SDRAM
Compensation for board delays and variable latencies through programmable
pipelines
Programmable output and ODT impedance with dynamic PVT compensation
Support one low-power work mode: power down DDR PHY and most of DDR IO
except two CS and two CKE output signals, make SDRAM still in self-refresh state
to prevent data missing.
Static Memory Interface (ASRAM/Nor Flash)
Compatible with standard async SRAM or Nor Flash
Support up to 2 banks (chip selects), maximum 1MB address space per bank
For bank0, 8bits/16bits data width is software programmable; For bank1, 16bits
data width is fixed
Support separately data and address bus, also support shared data and address
bus to save IO numbers
Nand Flash Interface
Support 8bits/16bits async nand flash, up to 8 banks
Support 8bits sync DDR nand flash, up to 8 banks
Rockchips Confidential
5
5 Page 
RK3066 Datasheet brief
Rev1.0
2D Graphics Engine :
Bit Blit with Strength Blit, Simple Blit and Filter Blit
High-performance stretch and shrink
Monochrome expansion for text rendering
ROP2, ROP3, ROP4 full alpha blending and transparency
Alpha blending modes including Java 2 Porter-Duff compositing blending rules,
chroma key, and pattern mask
8K x 8K raster 2D coordinate system
Programmable bicubic filter to support image scaling
Source format :
ABGR8888, XBGR888, ARGB8888, XRGB888
RGB888, RGB565
RGBA5551, RGBA4444
YUV420 planar, YUV420 semi-planar
YUV422 planar, YUV422 semi-planar
BPP8, BPP4, BPP2, BPP1
Destination formats :
ABGR8888, XBGR888, ARGB8888, XRGB888
RGB888, RGB565
RGBA5551, RGBA4444
YUV420 planar, YUV420 semi-planar only in filter and pre-scale mode
YUV422 planar, YUV422 semi-planar only in filter and pre-scale mode
1.2.10 Video IN/OUT
Camera Interface
2 independent camera interface controller
Support up to 5M pixels
8bits CCIR656(PAL/NTSC) interface
8bits/10bits/12bits raw data interface
YUV422 data input format with adjustable YUV sequence
YUV422,YUV420 output format with separately Y and UV space
Support picture in picture (PIP)
Support simple image effects such as Arbitrary(sepia), Negative, Art freeze,
Embossing etc.
Support static histogram statistics and white balance statistics
Support image crop with arbitrary windows
Support scale up/down from 1/8 to 8 with arbitrary non-integer ratio
Display Interface
independent two display controllers for HDMI and TFT dual panel display
Support LCD or TFT interfaces up to 1920x1080
Support HDMI 1.4 output up to 1080p@30fps
Support TV interface with ITU-R BT.656 (8bits, 480i/576i/1080i)
Parallel RGB LCD Interface: RGB888(24bits),RGB666(18bits), RGB565(15bits)
Serial RGB LCD Interface: 3x8bits with RGB delta support, 3x8bits followed by
dummy data, 16bits followed by 8bits
MCU LCD interface : i-8080 with up to 24bits RGB
5 display layers :
One background layer with programmable 24bits color
One video layer (win0)
RGB888, ARGB888, RGB565, YUV422, YUV420, AYUV
maximum resolution is 1920x1080
1/8 to 8 scaling up/down engine with arbitrary non-integer ratio
256 level alpha blending
Support transparency color key
Rockchips Confidential
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet RK3066.PDF ] | |
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