파트넘버.co.kr N25Q512A 데이터시트 PDF


N25Q512A 반도체 회로 부품 판매점

NOR Flash Memory



Micron 로고
Micron
N25Q512A 데이터시트, 핀배열, 회로
512Mb, Multiple I/O Serial Flash Memory
Features
Micron Serial NOR Flash Memory
3V, Multiple I/O, 4KB Sector Erase
N25Q512A
Features
• Stacked device (two 256Mb die)
• SPI-compatible serial bus interface
• Double transfer rate (DTR) mode
• 2.7–3.6V single supply voltage
• 108 MHz (MAX) clock frequency supported for all
protocols in single transfer rate (STR) mode
• 54 MHz (MAX) clock frequency supported for all
protocols in DTR mode
• Dual/quad I/O instruction provides increased
throughput up to 54 MB/s
• Supported protocols
– Extended SPI, dual I/O, and quad I/O
– DTR mode supported on all
• Execute-in-place (XIP) mode for all three protocols
– Configurable via volatile or nonvolatile registers
– Enables memory to work in XIP mode directly af-
ter power-on
• PROGRAM/ERASE SUSPEND operations
• Available protocols
– Available READ operations
– Quad or dual output fast read
– Quad or dual I/O fast read
• Flexible to fit application
– Configurable number of dummy cycles
– Output buffer configurable
• Software reset
• Additional reset pin for selected part numbers 1
• 3-byte and 4-byte addressability mode supported
• 64-byte, user-lockable, one-time programmable
(OTP) dedicated area
• Erase capability
– Subsector erase 4KB uniform granularity blocks
– Sector erase 64KB uniform granularity blocks
– Single die erase
• Write protection
– Software write protection applicable to every
64KB sector via volatile lock bit
– Hardware write protection: protected area size
defined by five nonvolatile bits (BP0, BP1, BP2,
BP3, and TB)
– Additional smart protections, available upon re-
quest
• Electronic signature
– JEDEC-standard 2-byte signature (BA20h)
– Unique ID code (UID): 17 read-only bytes,
including: Two additional extended device ID
bytes to identify device factory options; and cus-
tomized factory data (14 bytes)
• Minimum 100,000 ERASE cycles per sector
• More than 20 years data retention
• Packages – JEDEC-standard, all RoHS-compliant
– V-PDFN-8/8mm x 6mm (also known as SON,
DFPN, MLP, MLF)
– SOP2-16/300mils (also known as SO16W, SO16-
Wide, SOIC-16)
– T-PBGA-24b05/6mm x 8mm (also known as
TBGA24)
Note:
1. Part numbers: N25Q512A83G1240x,
N25Q512A83GSF40x,
N25Q512A83GSFA0x,N25Q512A83G12A0x
and N25Q512A83G12H0x see table 43 for x
last digit details
PDF: 09005aef84752721
n25q_512mb_1ce_3V_65nm.pdf - Rev. T 08/14 EN
1 Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2011 Micron Technology, Inc. All rights reserved.
Products and specifications discussed herein are subject to change by Micron without notice.


N25Q512A 데이터시트, 핀배열, 회로
512Mb, Multiple I/O Serial Flash Memory
Features
Contents
Device Description ........................................................................................................................................... 6
Features ....................................................................................................................................................... 6
3-Byte Address and 4-Byte Address Modes ..................................................................................................... 6
Operating Protocols ...................................................................................................................................... 6
XIP Mode ..................................................................................................................................................... 7
Device Configurability .................................................................................................................................. 7
Signal Assignments ........................................................................................................................................... 8
Signal Descriptions ......................................................................................................................................... 10
Memory Organization .................................................................................................................................... 12
Memory Configuration and Block Diagram .................................................................................................. 12
Memory Map – 512Mb Density ....................................................................................................................... 13
Device Protection ........................................................................................................................................... 14
Serial Peripheral Interface Modes .................................................................................................................... 16
SPI Protocols .................................................................................................................................................. 18
Nonvolatile and Volatile Registers ................................................................................................................... 19
Status Register ............................................................................................................................................ 20
Nonvolatile and Volatile Configuration Registers .......................................................................................... 21
Extended Address Register .......................................................................................................................... 24
Enhanced Volatile Configuration Register .................................................................................................... 25
Flag Status Register ..................................................................................................................................... 26
Command Definitions .................................................................................................................................... 28
READ REGISTER and WRITE REGISTER Operations ........................................................................................ 32
READ STATUS REGISTER or FLAG STATUS REGISTER Command ................................................................ 32
READ NONVOLATILE CONFIGURATION REGISTER Command ................................................................... 33
READ VOLATILE or ENHANCED VOLATILE CONFIGURATION REGISTER Command .................................. 33
READ EXTENDED ADDRESS REGISTER Command ..................................................................................... 34
WRITE STATUS REGISTER Command ......................................................................................................... 34
WRITE NONVOLATILE CONFIGURATION REGISTER Command ................................................................. 35
WRITE VOLATILE or ENHANCED VOLATILE CONFIGURATION REGISTER Command ................................. 35
WRITE EXTENDED ADDRESS REGISTER Command ................................................................................... 36
READ LOCK REGISTER Command .............................................................................................................. 36
WRITE LOCK REGISTER Command ............................................................................................................ 38
CLEAR FLAG STATUS REGISTER Command ................................................................................................ 39
READ IDENTIFICATION Operations ............................................................................................................... 40
READ ID and MULTIPLE I/O READ ID Commands ...................................................................................... 40
READ SERIAL FLASH DISCOVERY PARAMETER Command ......................................................................... 41
READ MEMORY Operations ............................................................................................................................ 45
3-Byte Address ........................................................................................................................................... 45
4-Byte Address ........................................................................................................................................... 46
READ MEMORY Operations Timing – Single Transfer Rate ........................................................................... 48
READ MEMORY Operations Timing – Double Transfer Rate ......................................................................... 52
PROGRAM Operations .................................................................................................................................... 56
WRITE Operations .......................................................................................................................................... 61
WRITE ENABLE Command ......................................................................................................................... 61
WRITE DISABLE Command ........................................................................................................................ 61
ERASE Operations .......................................................................................................................................... 63
SUBSECTOR ERASE Command ................................................................................................................... 63
SECTOR ERASE Command ......................................................................................................................... 63
DIE ERASE Command ................................................................................................................................ 64
BULK ERASE Command ............................................................................................................................. 65
PDF: 09005aef84752721
n25q_512mb_1ce_3V_65nm.pdf - Rev. T 08/14 EN
2 Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2011 Micron Technology, Inc. All rights reserved.




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