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Optimized for Broadband Applications



Intel Corporation 로고
Intel Corporation
GWIXP425ACT 데이터시트, 핀배열, 회로
Intel®
Internet Exchange
Architecture
product brief
Intel® IXP425 Network
Processor Family
Optimized for Broadband Applications
Product Highlights
s Intel® XScaleRISC core up to 533 MHz
s Three network processor engines
s Two high-speed serial interfaces
s Two 10/100 Base-T Ethernet MACs with
MII/RMII interface
s UTOPIA 2 interface—multiple
ADSL/G.SHDSL or VDSL support
s PCI version 2.2 Host and Option interface
s Hardware Security Accelerator (IPsec:
DES, 3DES, SHA1, MD5)
s USB version 1.1 device controller
s Two UARTS—one High-Speed UART
(921.6 Kbaud) and one Console UART
(230.4 Kbaud)
s 32-bit wide SDRAM controller
s Sixteen GPIO pins
s 16-bit configurable expansion bus
s ATM, TDM, Ethernet MAC filtering, and
HDLC support
s Operating system support for VxWorks*
and Linux*
s Commercial and Extended temperature
options
Product Overview
To meet the growing demand from homes and
businesses for high-performance broadband
access services, manufacturers must develop
new networking products that are capable of
provisioning rich services. The Intel® IXP425
network processors are designed to meet the
needs of last-mile applications, such as cus-
tomer premises equipment, and mini-DSLAMs
for multi-dwelling units (MxUs). These network
processors deliver wire-speed performance and
sufficient "processor headroom" for manufactur-
ers to add a variety of rich software services to
support their networking applications. These
are highly integrated network processors that
support multiple WAN and LAN technologies
giving customers a common architecture for
multiple applications.
With their Development Platform, a choice
of operating systems, and a broad range of
development tools, the Intel IXP425 network
processors provide a complete development
environment for faster time-to-market. This
network processor family offers the choice of
multiple clock speeds at 266, 400, and 533
MHz, with both Commercial (0° to 70° C) and
Extended (-40° to 85° C) temperature options.
Architected for Broadband Applications
The Intel IXP425 network processor family
meets the requirements of next-generation
broadband applications by integrating a unique
distributed processing architecture that
features the performance of the Intel XScale
core and three Network Processor Engines
(NPEs). The combination of the four high-
performance processors provides tremendous
processing power and enables wire-speed
performance at both the LAN and WAN ports.
Distributed Processing Architecture
The Intel XScale core and the three NPEs run
their instruction streams in parallel. The Intel
XScale core is fully compatible with ARM* V5T
Thumb instructions set and V5E DSP exten-
sions. Designed on the Intel® 0.18-micron
process technology, the Intel XScale core
delivers the industry-leading MIPs to power
consumption ratio and provides ample pro-
cessing headroom for the customer to add
differentiating product features.


GWIXP425ACT 데이터시트, 핀배열, 회로
Distributed Processing Architecture (continued)
The three NPEs are designed to offload many computa-
tionally intensive data plane operations from the Intel
XScale core. These tasks include: IP header inspection
and modification; packet filtering; packet error checking;
check sum computation; flag insertion and removal; PDU
segmentation and assembly; and encryption. The NPE
architecture includes an ALU, self-contained internal data
memory, an extensive list of I/O interfaces, together with
hardware acceleration engines (also known as NPE
coprocessors). It is the NPE coprocessor associated
with an NPE that targets a set of networking applications.
Each NPE coprocessor is designed to accelerate a
specific networking task that would otherwise take many
MIPs to complete by a stand-alone RISC processor.
Each NPE can take care of Layer 2 and, in some cases,
Layer 3 packets that are passed through them. For example,
the WAN/Voice NPE has one UTOPIA 2 interface and two
high-speed serial interfaces so its internal processing is
targeting the handling of AAL (1/2/5) SARing, TDM framing,
and HDLC processing. An MII/RMII interface is attached
to both the Ethernet NPE A and the Ethernet NPE B
respectively. The Ethernet NPE A also has two internal
coprocessors to accelerate VPN related tasks such as
3DES and Hashing at speeds up to full-rate ADSL. The
Ethernet NPE B is capable of handling 100Mb/s, full-duplex
Ethernet packet filtering. The extensive hardware capabilities
of these NPEs are all under the management of a set of
NPE microcode drivers that are released as a software
library together with the Intel IXP425 network processors.
Customer applications configure and interact with the
NPEs through a high-performance API layer running on
the Intel XScale core.
Wire-Speed Performance
The Intel IXP425 network processors implement a fast
path design in the NPE software library to provide
optimized performance for broadband applications.
The fast path design passes non-inspection IP packets
directly from the ingress port NPE (usually WAN/Voice
NPE with the xDSL WAN port) to the egress port NPE
(usually Ethernet NPE A or B with the Ethernet LAN port)
without the involvement of the Intel XScale core. Since
the vast majority of IP packets move from the WAN to
the Ethernet LAN, isolating these data flows to the NPEs
within the Intel IXP425 network processor produces a
significant throughput improvement by eliminating the
need to route packets through a central processor. The
most demanding situation occurs when small (64 byte)
IP packets are sent at the speed that saturates the
physical layer (wire speed). For example, nearly 10,000
(64 byte) packets per second will be sent downstream
in an ADSL connection that runs at the maximum wire
speed (8 Mb/s downstream). The NPEs and fast path
design in the Intel IXP425 network processors are capable
of providing, at minimum packet sizes, wire-speed perfor-
mance up to 52 Mb/s on the WAN side and 100 Mb/s on
the Ethernet LAN.




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Optimized for Broadband Applications - Intel Corporation