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DM74S161 반도체 회로 부품 판매점

Synchronous 4-Bit Binary Counters



National Semiconductor 로고
National Semiconductor
DM74S161 데이터시트, 핀배열, 회로
February 1992
DM74S161 DM74S163
Synchronous 4-Bit Binary Counters
General Description
These synchronous presettable counters feature an inter-
nal carry look-ahead for application in high-speed counting
designs They are 4-bit binary counters The carry output is
decoded by means of a NOR gate thus preventing spikes
during the normal counting mode of operation Synchronous
operation is provided by having all flip-flops clocked simulta-
neously so that the outputs change coincident with each
other when so instructed by the count enable inputs and
internal gating This mode of operation eliminates the output
counting spikes which are normally associated with asyn-
chronous (ripple clock) counters A buffered clock input trig-
gers the four flip-flops on the rising (positive-going) edge of
the clock input waveform
These counters are fully programmable that is the outputs
may be preset to either level As presetting is synchronous
setting up a low level at the load input disables the counter
and causes the outputs to agree with the setup data after
the next clock pulse regardless of the levels of the enable
input
The carry look-ahead circuitry provides for cascading coun-
ters for n-bit synchronous applications without additional
gating Instrumental in accomplishing this function are two
count-enable inputs and a ripple carry output Both count-
enable inputs (P and T) must be high to count and input T is
fed forward to enable the ripple carry output The ripple car-
ry output thus enabled will produce a high-level output pulse
with a duration approximately equal to the high-level portion
of the QA output This high-level overflow ripple carry pulse
can be used to enable successive cascaded stages
Features
Y Synchronously programmable
Y Internal look-ahead for fast counting
Y Carry output for n-bit cascading
Y Synchronous counting
Y Load control line
Y Diode-clamped inputs
Connection Diagram
Dual-In-Line Package
Order Number DM74S161N or DM74S163N
See NS Package Number N16E
TL F 6471 – 1
C1995 National Semiconductor Corporation TL F 6471
RRD-B30M105 Printed in U S A


DM74S161 데이터시트, 핀배열, 회로
Absolute Maximum Ratings (Note)
Supply Voltage
7V
Input Voltage
5 5V
Operating Free Air Temperature Range
0 C to a70 C
Storage Temperature Range
b65 C to a150 C
Note The ‘‘Absolute Maximum Ratings’’ are those values
beyond which the safety of the device cannot be guaran-
teed The device should not be operated at these limits The
parametric values defined in the ‘‘Electrical Characteristics’’
table are not guaranteed at the absolute maximum ratings
The ‘‘Recommended Operating Conditions’’ table will define
the conditions for actual device operation
Recommended Operating Conditions See Section 1 for Test Waveforms and Output Load
Symbol
Parameter
VCC Supply Voltage
VIH High Level Input Voltage
VIL Low Level Input Voltage
IOH High Level Output Current
IOL Low Level Output Current
fCLK
Clock Frequency (Note 1)
Clock Frequency (Note 2)
tw
Pulse Width (Note 1)
Clock
Clear (Note 4)
Pulse Width (Note 2)
Clock
Clear (Note 4)
tSU
Setup Time (Note 1)
Data
Enable P or T
Load
Clear (Note 3)
Setup Time (Note 2)
Data
Enable P or T
Load
Clear (Note 3)
tH
Hold Time (Note 1)
Data
Others
Hold Time (Note 2)
Data
Others
tREL Load or Clear Release Time (Note 1)
Load or Clear Release Time (Note 2)
TA Free Air Operating Temperature
Note 1 CL e 15 pF RL e 280X TA e 25 C and VCC e 5V
Note 2 CL e 50 pF RL e 280X TA e 25 C and VCC e 5V
Note 3 Applies only to the ’S163 which has synchronous clear inputs
Note 4 Applies only to the ’S161 which has asynchronous clear inputs
Min
4 75
2
0
0
10
10
12
12
4
12
14
14
5
14
16
16
3
0
5
2
12
14
0
Nom
5
Max
5 25
08
b1
20
40
35
70
Units
V
V
V
mA
mA
MHz
ns
ns
ns
ns
C
2




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