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Fairchild Semiconductor |
July 2002
FDS6676S
30V N-Channel PowerTrench® SyncFET™
General Description
The FDS6676S is designed to replace a single SO-8
MOSFET and Schottky diode in synchronous DC:DC
power supplies. This 30V MOSFET is designed to
maximize power conversion efficiency, providing a low
RDS(ON) and low gate charge. The FDS6676S includes
an integrated Schottky diode using Fairchild’s
monolithic SyncFET technology.
Applications
• DC/DC converter
• Motor drives
Features
• 14.5 A, 30 V.
RDS(ON) typ 5.25 mΩ @ VGS = 10 V
RDS(ON) typ 6.00 mΩ @ VGS = 4.5 V
• Includes SyncFET Schottky body diode
• Low gate charge (43nC typical)
• High performance trench technology for extremely low
RDS(ON) and fast switching
• High power and current handling capability
D
D
D
D
SO-8
G
SS
S
Absolute Maximum Ratings TA=25oC unless otherwise noted
Symbol
VDSS
VGSS
ID
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current – Continuous
– Pulsed
(Note 1a)
PD
Power Dissipation for Single Operation
(Note 1a)
(Note 1b)
(Note 1c)
TJ, TSTG
Operating and Storage Junction Temperature Range
Thermal Characteristics
RθJA Thermal Resistance, Junction-to-Ambient
RθJC Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
Package Marking and Ordering Information
Device Marking
Device
Reel Size
FDS6676S
FDS6676S
13’’
5
6
7
8
Ratings
30
±16
14.5
50
2.5
1.2
1
–55 to +150
50
25
Tape width
12mm
4
3
2
1
Units
V
V
A
W
°C
°C/W
Quantity
2500 units
©2002 Fairchild Semiconductor Corporation
FDS6676S Rev E1 (W)
Electrical Characteristics
Symbol
Parameter
TA = 25°C unless otherwise noted
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
Drain–Source Breakdown Voltage
∆BVDSS
∆TJ
IDSS
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
IGSSF
Gate–Body Leakage, Forward
IGSSR
Gate–Body Leakage, Reverse
VGS = 0 V,
ID = 1 mA
ID = 1 mA, Referenced to 25°C
VDS = 24 V,
VGS = 16 V,
VGS = –16 V,
VGS = 0 V
VDS = 0 V
VDS = 0 V
30
21
V
mV/°C
500
100
–100
µA
nA
nA
On Characteristics (Note 2)
VGS(th)
Gate Threshold Voltage
∆VGS(th)
∆TJ
RDS(on)
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
ID(on) On–State Drain Current
gFS Forward Transconductance
VDS = VGS,
ID = 1 mA
ID = 1 mA, Referenced to 25°C
VGS = 10 V, ID = 14.5 A
VGS = 4.5 V, ID = 13.2 A
VGS=10 V, ID =14.5A, TJ=125°C
VGS = 10 V, VDS = 5 V
VDS = 10 V, ID = 14.5 A
1 1.4
2
V
–3.8 mV/°C
5.25
6.0
8.0
7.5
9.0
12
50
80
mΩ
A
S
Dynamic Characteristics
Ciss Input Capacitance
Coss Output Capacitance
Crss Reverse Transfer Capacitance
RG Gate Resistance
VDS = 15 V,
f = 1.0 MHz
V GS = 0 V,
VGS = 15 mV, f = 1.0 MHz
4665
826
304
1.4
pF
pF
pF
Ω
Switching Characteristics (Note 2)
td(on) Turn–On Delay Time
tr Turn–On Rise Time
td(off) Turn–Off Delay Time
tf Turn–Off Fall Time
Qg Total Gate Charge
Qgs Gate–Source Charge
Qgd Gate–Drain Charge
VDD = 15 V,
VGS = 10 V,
ID = 1 A,
RGEN = 6 Ω
VDS = 15 V,
VGS = 5 V
ID = 14.5 A,
11 20
10 20
82 131
30 48
43 60
10
11
ns
ns
ns
ns
nC
nC
nC
Drain–Source Diode Characteristics and Maximum Ratings
VSD
Drain–Source Diode Forward
VGS = 0 V, IS = 3.5 A (Note 2)
Voltage
VGS = 0 V, IS = 7 A
(Note 2)
trr
Diode Reverse Recovery Time
IF = 14.5A,
IRM
Diode Reverse Recovery Current diF/dt = 300 A/µs
(Note 3)
390 700
490
31
1.8
mV
nS
A
Qrr Diode Reverse Recovery Charge
30 nC
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a) 50°/W when
mounted on a 1 in2
pad of 2 oz copper
Scale 1 : 1 on letter size paper
Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
b) 105°/W when
mounted on a .04 in2
pad of 2 oz copper
c) 125°/W when mounted on a
minimum pad.
See “SyncFET Schottky body diode
characteristics” below
FDS6676S Rev E1 (W)
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