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HCPL-0701 반도체 회로 부품 판매점

LOW INPUT CURRENT HIGH GAIN SPLIT DARLINGTON OPTOCOUPLERS



Fairchild Semiconductor 로고
Fairchild Semiconductor
HCPL-0701 데이터시트, 핀배열, 회로
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
HCPL-0700
HCPL-0701
DESCRIPTION
The HCPL-0700 and HCPL-0701 optocouplers consist of an AlGaAs LED optically coupled to a high gain split darlington
photodetector housed in a compact 8-pin small outline package.
The split darlington configuration separating the input photodiode and the first stage gain from the output transistor permits lower
output saturation voltage and higher speed operation than possible with conventional darlington phototransistor optocoupler.
The combination of a very low input current of 0.5 mA and a high current transfer ratio of 2000% makes this family particularly
useful for input interface to MOS, CMOS, LSTTL and EIA RS232C, while output compatibility is ensured to CMOS as well as high
fan-out TTL requirements.
FEATURES
• Low current - 0.5 mA
• Superior CTR-2000%
• Superior CMR-10 kV/µs
• CTR guaranteed 0-70°C
• *BSI, CSA and UL approval
PACKAGE DIMENSIONS
0.164 (4.16)
0.144 (3.66)
APPLICATIONS
• Digital logic ground isolation
• Telephone ring detector
• EIA-RS-232C line receiver
• High common mode noise
line receiver
• µP bus isolation
• Current loop receiver
N/C 1
+2
V
F
_3
N/C 4
8
V
CC
7
V
B
6V
O
5 GND
HCPL-0700 / HCPL-0701
Pin 1
0.202 (5.13)
0.182 (4.63)
0.143 (3.63)
0.123 (3.13)
0.019 (0.48)
0.010 (0.25)
0.006 (0.16)
0.021 (0.53)
0.011 (0.28)
0.008 (0.20)
0.003 (0.08)
0.050 (1.27)
TYP
0.244 (6.19)
0.224 (5.69)
Lead Coplanarity : 0.004 (0.10) MAX
NOTE
All dimensions are in inches (millimeters)
© 2003 Fairchild Semiconductor Corporation
Page 1 of 11
8/18/03


HCPL-0701 데이터시트, 핀배열, 회로
HCPL-0700
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
HCPL-0701
ABSOLUTE MAXIMUM RATINGS (TA = 25°C unless otherwise specified)
Parameter
Storage Temperature
Operating Temperature
Reflow Temperature Profile (Refer to fig. 11)
EMITTER
DC/Average Forward Input Current
Peak Forward Input Current (50% duty cycle, 1 ms P.W.)
Peak Transient Input Current - (1 µs P.W., 300 pps)
Reverse Input Voltage
Input Power Dissipation
DETECTOR
Average Output Current (Pin 6)
Emitter-Base Reverse Voltage
Supply Voltage, Output Voltage
HCPL-0700
HCPL-0701
Output power dissipation
Symbol
TSTG
TOPR
IF (avg)
IF (pk)
IF (trans)
VR
PD
IO (avg)
VEBR
VCC, VO
PD
Value
-55 to +125
-55 to +85
20
40
1.0
5
35
60
0.5
-0.5 to 7
-0.5 to 18
100
*Samples submitted for certification - Approval pending
Units
°C
°C
mA
mA
A
V
mW
mA
V
V
mW
ELECTRICAL CHARACTERISTICS (TA = 0 to 70°C Unless otherwise specified)
INDIVIDUAL COMPONENT CHARACTERISTICS
Parameter
Test Conditions Symbol Device Min Typ** Max Unit
EMITTER
(TA =25°C)
Input Forward Voltage
(IF = 1.6 mA)
Input Reverse Breakdown Voltage
(TA =25°C, IR = 10 µA)
Temperature coefficient of forward voltage
(IF = 1.6 mA)
DETECTOR
Logic high output current
(IF = 0 mA, VO = VCC = 18 V)
(IF = 0 mA, VO = VCC = 7 V)
Logic low supply
(IF = 1.6 mA, VO = Open)
(VCC = 18 V)
Logic high supply
(IF = 0 mA, VO = Open)
(VCC = 18 V)
VF
BVR
(VF/TA)
IOH
ICCL
ICCH
All
All
All
HCPL-0701
HCPL-0700
HCPL-0700
HCPL-0701
HCPL-0700
HCPL-0701
1.0
5.0
1.27 1.7
1.75 V
20
-1.8 mV/°C
0.01 100
0.01 250
µA
0.4 1.5 mA
0.05 10
µA
© 2003 Fairchild Semiconductor Corporation
Page 2 of 11
8/18/03




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