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CAT28C512/513
512K-Bit CMOS PARALLEL EEPROM
FEATURES
s Fast Read Access Times: 120/150 ns
s Low Power CMOS Dissipation:
–Active: 50 mA Max.
–Standby: 200 µA Max.
s Simple Write Operation:
–On-Chip Address and Data Latches
–Self-Timed Write Cycle with Auto-Clear
s Fast Write Cycle Time:
–5ms Max
s CMOS and TTL Compatible I/O
DESCRIPTION
The CAT28C512/513 is a fast,low power, 5V-only CMOS
parallel EEPROM organized as 64K x 8-bits. It requires
a simple interface for in-system programming. On-chip
address and data latches, self-timed write cycle with
auto-clear and VCC power up/down write protection
eliminate additional timing and protection hardware.
DATA Polling and Toggle status bits signal the start and
end of the self-timed write cycle. Additionally, the
CAT28C512/513 features hardware and software write
protection.
BLOCK DIAGRAM
s Automatic Page Write Operation:
–1 to 128 Bytes in 5ms
–Page Load Timer
s End of Write Detection:
–Toggle Bit
–DATA Polling
s Hardware and Software Write Protection
s 100,000 Program/Erase Cycles
s 100 Year Data Retention
s Commercial, Industrial and Automotive
Temperature Ranges
The CAT28C512/513 is manufactured using Catalyst’s
advanced CMOS floating gate technology. It is designed
to endure 100,000 program/erase cycles and has a data
retention of 100 years. The device is available in JEDEC
approved 32-pin DIP, PLCC and TSOP packages.
A7–A15
VCC
CE
OE
WE
A0–A6
ADDR. BUFFER
& LATCHES
INADVERTENT
WRITE
PROTECTION
CONTROL
TIMER
ADDR. BUFFER
& LATCHES
ROW
DECODER
HIGH VOLTAGE
GENERATOR
DATA POLLING
AND
TOGGLE BIT
COLUMN
DECODER
65,536 x 8
EEPROM
ARRAY
128 BYTE PAGE
REGISTER
I/O BUFFERS
I/O0–I/O7
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
1
Doc. No. MD-1007, Rev. I
CAT28C512/513
PIN CONFIGURATION
DIP Package (L)
PLCC Package (N, G)
PLCC Package (N, G)
NC 1
32 VCC
NC 2
31 WE
A15 3
A12 4
A7 5
30 NC
29 A14
28 A13
4 3 2 1 32 31 30
A7 5
29 A14
A6 6
28 A13
A5 7
27 A8
4 3 2 1 32 31 30
A6 5
29 A8
A5 6
28 A9
A4 7
27 A11
A6
A5
A4
A3
A2
A1
A0
6 27
7 26
8 25
9 24
10 23
11 22
12 21
A8
A9
A11
OE
A10
CE
I/O7
A4
A3
A2
A1
A0
I/O0
8 CAT28C512 26
9 TOP VIEW 25
10 24
11 23
12 22
13 21
14 15 16 17 18 19 20
A9
A11
OE
A10
CE
I/O7
A3
A2
A1
A0
NC
I/O0
8
CAT28C513
26
9 TOP VIEW 25
10 24
11 23
12 22
13 21
14 15 16 17 18 19 20
NC
OE
A10
CE
I/O7
I/O6
I/O0 13 20 I/O6
I/O1 14 19 I/O5
I/O2 15 18 I/O4
VSS 16 17 I/O3
TSOP Package (8mmx20mm) (T, H)
A11
A9
A8
A13
A14
NC
WE
VCC
NC
NC
A15
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
CAT28C512
TOP VIEW
32 OE
31 A10
30 CE
29 I/O7
28 I/O6
27 I/O5
26 I/O4
25 I/O3
24 Vss
23 I/O2
22 I/O1
21 I/O0
20 A0
19 A1
18 A2
17 A3
PIN FUNCTIONS
Pin Name
A0–A15
Function
Address Inputs
Pin Name
WE
I/O0–I/O7
CE
OE
Data Inputs/Outputs
Chip Enable
Output Enable
VCC
VSS
NC
Function
Write Enable
5V Supply
Ground
No Connect
Doc. No. MD-1007, Rev. I
2
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
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