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Número de pieza UM10758
Descripción 65W notebook adapter
Fabricantes NXP Semiconductors 
Logotipo NXP Semiconductors Logotipo



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UM10758
TEA1836DB1094 TEA1836XT + TEA1792T 65 W notebook
adapter
Rev. 1 — 4 December 2013
User manual
Document information
Info Content
Keywords
TEA1836DB1094, TEA1836XT, very low standby power consumption,
high peak power, active X-cap discharge, burst mode operation, flyback
converter, 65 W, notebook adapter, controller, converter, power supply,
demo board
Abstract
TheTEA1836XT is a high-featured low-cost DCM/QR flyback converter
controller. It provides high efficiency at all power levels including very low
no-load power consumption at nominal output voltage in burst mode
operation.
To minimize the risk of audible noise, burst mode operation is included for
the low load range. Switching in the audible frequency range is limited and
peak currents are low.
The TEA1836XT is intended for power supplies up to 75 W with extra high
peak power capabilities to enable supplying high peak power equipment
without requiring a PFC.
This document describes the 65 W notebook adapter demo board with the
TEA1836XT and TEA1792TS. The demo board provides an output of
19.5 V/3.34 A.
The average efficiency is above 91 % and the no-load power consumption
is below 30 mW.
http://www.Datasheet4U.com

1 page




UM10758 pdf
NXP Semiconductors
3. Boa rd photographs
UM10758
TEA1836DB1094 TEA1836 + TEA1792 65 W notebook adapter
a. Top
b. Bottom
Fig 2. TEA1836XT and TEA1792TS demo board 65 W notebook adapter
UM10758
User manual
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 4 December 2013
© NXP B.V. 2013. All rights reserved.
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UM10758 arduino
NXP Semiconductors
UM10758
TEA1836DB1094 TEA1836 + TEA1792 65 W notebook adapter
5.12 Overvolt age protection
Applying a short circuit across the opto-LED of the optocoupler (U1B; see Figure 20)
creates an output overvoltage condition. The overvoltage protection is triggered when the
AUX pin voltage increases to 3 V during the OVP detection interval. The output voltage
was measured directly at the output connector for both a nominal load (3.34 A) and a
no-load condition.
Table 11. Maximum output voltage at OVP
Condition
115 V/60 Hz
no-load
25.6 V
nominal load (3.37 A)
25.1 V
230 V/50 Hz
25.6 V
25.1 V
a. Io = 0 A
Fig 8. Maximum output voltage when OVP is triggered
b. Io = 3.34 A
5.13 S tart-up time
This is the time between the mains voltage switching on and the nominal output power
available at the output.
Table 12. Start-up time
Condition
90 V/60 Hz
115 V/60 Hz
230 V/50 Hz
Start-up time
400 ms
300 ms
150 ms
5.14 S tart-up profile
The shape of the output voltage during start-up was measured for 90 V/60 Hz and
264 V/50 Hz directly at the output connector for a no-load and a nominal load (3.34 A)
condition.
UM10758
User manual
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 4 December 2013
© NXP B.V. 2013. All rights reserved.
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