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PDF M25P16 Data sheet ( Hoja de datos )
| Número de pieza | M25P16 | |
| Descripción | Flash Memory | |
| Fabricantes | Numonyx | |
| Logotipo |  |
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Numonyx® Forté™ Serial Flash Memory
M25P16
16 Mbit, serial Flash memory, 75 MHz SPI bus interface
Features
16 Mbit of Flash memory
Page Program (up to 256 bytes) in 0.64 ms
(typical)
Sector Erase (512 Kbit) in 0.6 s (typical)
Bulk Erase (16 Mbit) in 13 s (typical)
2.7 V to 3.6 V single supply voltage
SPI bus compatible serial interface
75 MHz Clock rate (maximum)
Deep Power-down mode 1 µA (typical)
Electronic signatures
– JEDEC standard two-byte signature
(2015h)
– Unique ID code (UID) with 16 bytes read-
only, available upon customer request
– RES instruction, one-byte, signature (14h),
for backward compatibility
More than 100,000 Erase/Program cycles per
sector
Hardware Write Protection: protected area size
defined by three non-volatile bits (BP0, BP1
and BP2)
More than 20 year data retention
Packages
– RoHS compliant
Automotive Certified Parts Available
VFDFPN8 (MP)
6 × 5 mm (MLP8)
VDFPN8 (ME)
8 x 6 mm (MLP8)
SO8N (MN)
150 mils width
PDIP8 (BA)
300 mils width
SO8W (MW)
208 mils width
SO16 (MF)
300 mils width
UFDFPN8 (MC)
(MLP8 4 x 3 mm)
April 2010
Rev 20
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1 page  
M25P16
List of figures
List of figures
Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 2. SO8, VFQFPN, VDFPN, and PDIP8 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 3. SO16 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Bus master and memory devices on the SPI bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 5. SPI modes supported . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 6. Hold condition activation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 7. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 8. Write Enable (WREN) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 9. Write Disable (WRDI) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 10. Read Identification (RDID) instruction sequence and data-out sequence . . . . . . . . . . . . . 20
Figure 11. Read Status Register (RDSR) instruction sequence and data-out sequence . . . . . . . . . . 22
Figure 12. Write Status Register (WRSR) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 13. Read Data Bytes (READ) instruction sequence and data-out sequence . . . . . . . . . . . . . . 25
Figure 14. Read Data Bytes at Higher Speed (FAST_READ) instruction sequence
and data-out sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 15. Page Program (PP) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 16. Sector Erase (SE) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 17. Bulk Erase (BE) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 18. Deep Power-down (DP) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 19. Release from Deep Power-down and Read Electronic Signature (RES) instruction
sequence and data-out sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Figure 20. Release from Deep Power-down (RES) instruction sequence . . . . . . . . . . . . . . . . . . . . . . 33
Figure 21. Power-up timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Figure 22. AC measurement I/O waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Figure 23. Serial input timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Figure 24. Write Protect setup and hold timing during WRSR when SRWD = 1 . . . . . . . . . . . . . . . . . 42
Figure 25. Hold timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Figure 26. Output timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Figure 27. VFQFPN8 (MLP8) 8-lead very thin fine pitch quad flat package no lead,
6 × 5 mm, package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Figure 28. VDFPN8 (MLP8) 8-lead very thin dual flat package no lead, 8 × 6 mm,
package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Figure 29. SO8N – 8 lead plastic small outline, 150 mils body width, package outline . . . . . . . . . . . . 47
Figure 30. SO8W – 8 lead plastic small outline, 208 mils body width, package outline. . . . . . . . . . . . 48
Figure 31. SO16 wide – 16-lead plastic small outline, 300 mils body width, package outline . . . . . . . 49
Figure 32. PDIP8 – 8 lead Plastic Small Outline, 300 mils body width, package outline . . . . . . . . . . . 50
Figure 33. UFDFPN (MLP8) 8-lead ultra thin fine pitch dual flat package no lead, 4X3 mm package me-
chanical data51
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5 Page 
M25P16
SPI modes
Example: Cp = 50 pF, that is R*Cp = 5 µs: the application must ensure that the Bus Master
never leaves the SPI bus in the high impedance state for a time period shorter than 5 µs.
Figure 5. SPI modes supported
CPOL CPHA
0 0C
1 1C
D MSB
Q MSB
AI01438B
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| Páginas | Total 59 Páginas | |
| PDF Descargar | [ Datasheet M25P16.PDF ] | |
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