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PDF RDA5802N Data sheet ( Hoja de datos )
| Número de pieza | RDA5802N | |
| Descripción | SINGLE-CHIP BROADCAST FM RADIO TUNER | |
| Fabricantes | RDA | |
| Logotipo |  |
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RDA5802N/NS/NM
SINGLE-CHIP BROADCAST FM RADIO TUNER
Rev.2.0–Mar.2011
1 General Description
The RDA58 02N series is the newe st genera tion
single-chip br oadcast FM stereo radio tuner with fu lly
integrated s ynthesizer, IF selectivity, R DS/RBDS an d
MPX decode r. The tuner uses the CMOS process,
support multi-interface an d require the least e xternal
component. The RDA580 2N series have three type
package size s , respective are RDA580 2N (QFN 4X4
mm, 24pins), RDA5802NS (QFN 3X3 mm, 20pins) an d
RDA5802NM (QFN 2X2 mm, 12pins). All these make it
very suitable for portable devices.
The RDA5802N series ha s a power ful low-IF d igital
audio processor , th is ma ke it ha ve o ptimum soun d
quality with varying reception conditions.
The RDA5802N series support frequency range is from
50MHz to 115MHz.
24 23 22 21 20 19
GND 1
18 VDD
LNAN 2
GND 3
LNAP 4
GND 5
GND
PAD
RD A 5802N
17 GND
16 LOUT
15 ROUT
14 GND
GND 6
7
13 VDD
8 9 10 11 12
Figure1-1. RDA5802N Top View
1.1 Features
CMOS single-chpi fulyl -integrated FM tuner
Low power cosnumption
Total current cosnumption lower than20mAat 3.0V
powersupply when under normaslituation
Support worldwide frequency badn
50 -115MHz
Supportflexiblechannel spcaingmode
100KHz, 20K0Hz, 50KHz and25KHz
Support RDS/RBDS
Digital low-IF tuner
Image -reject down-converter
High performance A/cDonverter
IF selectivtyi performedinternally
Fully integrated digital frequencysyntheszier
Fully integrated on-chipRF andIFVCO
Fully integrated on-chiploopfilter
Autonomous search tuning
Support 32.768KHzcrystaloscillator
Digitalautogaincontrol(AGC)
Digitaladaptvie noise cancellation
Mono/ste reo switch
S oft mute
High cut
Progra mmablede-emphassi (50/75 s)
Receivesignalstrengthindicator(RSSI) andSNR
Bass boost
Volume control and mute
I 2S digtial output interface
Line-leveal nalogoutput votlage
32.768 KHz12M,24M,13M,2M6,19.2M,38.4MHz
Reference clock
Only support 2-wire bus interface
Copyright © RDA Microelectronics Inc. 2006. All rights are reserved.
The information contained herein is the exclusive property of RDA and shall not be distributed, reproduced, or disclosed in whole or in
part without prior written permission of RDA.
http://www.Datasheet4U.com
1 page  
RDA Microelectronics, Inc.
2.3 Po wer Supply
The RDA58 02N integ rated one L DO which
supplies po wer to the chi p. The external su pply
voltage range is 1.8-5.5 V.
2.4 RESET and Control Interface select
The RDA580 2N is RESE T it self Whe n VIO is
Power up. A nd al so supp ort so ft re set by trigge r
02H BIT1 from 0 to 1. The RDA5802N only
support I2C control interface bus mode.
2.5 Con trol Interface
The RDA58 02N o nly sup ports I 2C co ntrol
interface.
The I 2C int erface is compliant to I 2C Bus
Specification 2.1. It include s two pins: SCLK and
SDIO. A I2C interface transfer begins with START
condition, a comman d byte and dat a bytes, each
byte has a followed ACK (or NACK) bit, and ends
with STOP condition. The command byte includes
a 7-bit chip address (00 10000b) and a R/W bit.
The ACK (or NACK) is always sent out by receiver.
When in write tran sfer, d ata bytes i s written o ut
from MCU, a nd when in read tran sfer, data bytes
is rea d out from RDA 5802N. The re is no visible
register address in I2C interface transfers. The I2C
interface has a fixed start register address (0x02h
for write transfer and 0x0Ah for read transfer), and
an internal incremental address counter. If register
address mee ts the end of r egister file , 0x3Ah,
register address will wrap back to 0x00h. For write
transfer, MCU pro grams registers fro m regi ster
0x02h high byte, then register 0x02 h low byte,
then register 0x03h high byte, till the last re gister.
RDA5802N always gives out ACK after every byte,
RDA5802N/NS/NM FM Tuner V2.0
and MCU gives out STOP condition when register
programming is finished. For rea d tran sfer, af ter
command byte from MCU, RDA58 02N sends out
register 0x0Ah high byte, then regi ster 0x0Ah low
byte, then register 0x0Bh high byte, till receive s
NACK from MCU. M CU gives out AC K for dat a
bytes besi des last dat a byte. MCU gives out
NACK for last data byte, and then RDA5802N will
return the bu s to MCU, a nd MCU will give out
STOP condition.
2.6 I 2S Audio Data Interface
The RDA5802N supports I2S (Inter_IC Sound Bus)
audio interfa ce. The interface is fully compliant
with I2S bus specification. When setting I2SEN bit
high, RDA5802N will output SCK, WS, SD signals
from GPIO3, GPIO1, GPIO2 as I 2S m aster and
transmitter, the sampl e rate is 48Kbp s ，
44.1kbps,32kbps….. RDA5802 N al so support as
I2S slaver mode and tran smitter, the sample rate
is less than 100kbps.
2.7 GPIO Outputs
The RDA5802N has three GPIOs. The function of
GPIOs could pro grammed with bits G PIO1[1:0],
GPIO2[1:0], GPIO3[1:0] and I2SEN.
If I2SEN is s et to low , GPIO pins c ould be
programmed to output low or high or high-Z, or be
programmed to output interru pt a nd ste reo
indicator with bits GPIO1[1:0], GPIO2[1:0],
GPIO3[1:0]. GPIO2 coul d be progra mmed to
output a low interrupt (inte rrupt will be gene rated
only with interrupt enable bit STCIEN is set to high)
when seek/tune process completes. GPIO3 could
be programmed to output stereo indicator bit ST.
Constant low , high o r high-Z functi onality is
available regardless of the st ate of VDD su pplies
or the ENABLE bit.
SCK
WS
SD
1 SCK
MSB
LEFT CHANNEL
RIGHT CHANNEL
LSB
1 SCK
MSB
LSB
Figure 3-2 I2S Digital Audio Format
The information contained herein is the exclusive property of RDA and shall not be distributed, reproduced, or disclosed in whole or in
part without prior written permission of RDA.
Page 5 of 29
5 Page 
RDA Microelectronics, Inc.
REG
8
BITS
9
NAME
SOFTMUTE_EN
AFCD
7
6
RSVD
I2S_ENABLED
5:4 GPIO3[1:0]
3:2 GPIO2[1:0]
1:0 GPIO1[1:0]
05H 15
INT _MODE
14:13 SEEK_MODE[1:0]
12 RSVD
11:8
SEEKTH[3:0]2
7:6 LNA_PORT_SEL[1:0]
5:4
3:0
RSVD
VOLUME[3:0]
06H 15
14:13
RSVD
OPEN_MODE[1:0]
12 I2S_MODE3
RDA5802N/NS/NM FM Tuner V2.0
If 1, softmute enable
AFC disable.
If 0, afc work;
If 1, afc disabled.
FUNCTION
DEFAULT
1
0
Reserved
I2S bus enable
If 0, disabled;
If 1, enabled.
General Purpose I/O 3.
00 = High impedance
01 = Mono/Stereo indicator (ST)
10 = Low
11 = High
General Purpose I/O 2.
00 = High impedance
01 = Interrupt (INT)
10 = Low
11 = High
General Purpose I/O 1.
00 = High impedance
01 = Reserved
10 = Low
11 = High
If 0, generate 5ms interrupt;
0
00
00
00
1
If 1, interrupt last until read reg0CH action occurs.
RDA5802N Seek Mode Select
Reserved
Seek SNR threshold value:
00
0
1000
Noise_th(dB) = 79 – seek_th
LNA input port selection bit:
10
00: no input
01: LNAN
10: LNAP
11: dual port input
Resvered
DAC Gain Control Bits (Volume).
0000=min; 1111=max
Volume scale is logarithmic
When 0000, output mute and output impedance is very large
reserved
Open reserved register mode.
11=open beh ind registers writing function others: only open
behind registers reading function
If 0, master mode;
00
1111
0
00
0
If 1, slave mode.
2 The default noise threshold is 71dB
3 This function is open when I2S_Enabled=1.
The information contained herein is the exclusive property of RDA and shall not be distributed, reproduced, or disclosed in whole or in
part without prior written permission of RDA.
Page 11 of 29
11 Page | ||
| Páginas | Total 29 Páginas | |
| PDF Descargar | [ Datasheet RDA5802N.PDF ] | |
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