J603 반도체 회로 부품 판매점
P-Channel MOSFET ( Transistor ) - 2SJ603
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 NEC |
DATA SHEET
MOS FIELD EFFECT TRANSISTOR
2SJ603
SWITCHING
P-CHANNEL POWER MOS FET
DESCRIPTION
The 2SJ603 is P-channel MOS Field Effect Transistor designed
for solenoid, motor and lamp driver.
FEATURES
• Super low on-state resistance:
RDS(on)1 = 48 mΩ MAX. (VGS = −10 V, ID = −13 A)
RDS(on)2 = 75 mΩ MAX. (VGS = −4.0 V, ID = −13 A)
• Low input capacitance:
Ciss = 1900 pF TYP. (VDS = −10 V, VGS = 0 V)
• Built-in gate protection diode
ABSOLUTE MAXIMUM RATINGS (TA = 25°C)
Drain to Source Voltage (VGS = 0 V)
VDSS
−60
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Gate to Source Voltage (VDS = 0 V)
Drain Current (DC) (TC = 25°C)
Drain Current (pulse) Note1
VGSS
ID(DC)
ID(pulse)
m 20
m 25
m 70
Total Power Dissipation (TC = 25°C) PT 50
Total Power Dissipation (TA = 25°C)
PT 1.5
Channel Temperature
Tch 150
Storage Temperature
Single Avalanche Current Note2
Single Avalanche Energy Note2
Tstg −55 to +150
IAS −25
EAS 62.5
ORDERING INFORMATION
PART NUMBER
PACKAGE
2SJ603
2SJ603-S
TO-220AB
TO-262
2SJ603-ZJ
2SJ603-Z
TO-263
TO-220SMD Note
Note TO-220SMD package is produced only in
Japan.
(TO-220AB)
V
V
A
A
W
W (TO-262)
°C
°C
A
mJ
Notes 1. PW ≤ 10 µs, Duty cycle ≤ 1%
2. Starting Tch = 25°C, VDD = −30 V, RG = 25 Ω, VGS = −20 → 0 V
(TO-263, TO-220SMD)
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. D14648EJ3V0DS00 (3rd edition)
Date Published July 2002 NS CP(K)
Printed in Japan
The mark 5 shows major revised points.
©
2000, 2001
Free Datasheet http://www.datasheet4u.com/
2SJ603
ELECTRICAL CHARACTERISTICS (TA = 25°C)
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
Zero Gate Voltage Drain Current
Gate Leakage Current
Gate Cut-off Voltage
Forward Transfer Admittance
Drain to Source On-state Resistance
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Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
Total Gate Charge
Gate to Source Charge
Gate to Drain Charge
Body Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
IDSS
IGSS
VGS(off)
| yfs |
RDS(on)1
RDS(on)2
Ciss
Coss
Crss
td(on)
tr
td(off)
tf
QG
QGS
QGD
VF(S-D)
trr
Qrr
VDS = −60 V, VGS = 0 V
VGS = m 20 V, VDS = 0 V
VDS = −10 V, ID = −1 mA
VDS = −10 V, ID = −13 A
VGS = −10 V, ID = −13 A
VGS = −4.0 V, ID = −13 A
VDS = −10 V
VGS = 0 V
f = 1 MHz
VDD = −30 V, ID = −13 A
VGS = −10 V
RG = 0 Ω
VDD = −48 V
VGS = −10 V
ID = −25 A
IF = 25 A, VGS = 0 V
IF = 25 A, VGS = 0 V
di/dt = 100 A / µs
MIN. TYP. MAX. UNIT
−10 µA
m 10 µA
−1.5 −2.0 −2.5 V
10 21
S
38 48 mΩ
53 75 mΩ
1900
pF
350 pF
140 pF
10 ns
11 ns
66 ns
20 ns
38 nC
7 nC
10 nC
1.0 V
49 ns
100 nC
TEST CIRCUIT 1 AVALANCHE CAPABILITY
D.U.T.
RG = 25 Ω
PG.
VGS = −20 → 0 V
50 Ω
L
VDD
− IAS BVDSS
VDS
ID
VDD
Starting Tch
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
RG
PG.
VGS (−)
0
τ
τ = 1 µs
Duty Cycle ≤ 1%
RL
VDD
VGS (−)
VGS
Wave Form
10%
0
VDS (−)
90%
VDS
VDS
0
Wave Form
td(on)
90%
VGS
10% 10%
90%
tr td(off) tf
ton toff
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
IG = −2 mA
PG. 50 Ω
RL
VDD
2 Data Sheet D14648EJ3V0DS
Free Datasheet http://www.datasheet4u.com/
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