|
|
PDF ADRF6807 Data sheet ( Hoja de datos )
| Número de pieza | ADRF6807 | |
| Descripción | 700 MHz to 1050 MHz Quadrature Demodulator | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de ADRF6807 (archivo pdf) en la parte inferior de esta página. Total 36 Páginas | ||
|
No Preview Available !
Data Sheet
700 MHz to 1050 MHz Quadrature
Demodulator with Fractional-N PLL
ADRF6807
FEATURES
GENERAL DESCRIPTION
IQ demodulator with integrated fractional-N PLL
LO frequency range: 700 MHz to 1050 MHz
For the following specifications (LPEN = 0)/(LPEN = 1):
Input P1dB: 12.8 dBm/11.7 dBm
Input IP3: 26.7 dBm/24.0 dBm
Noise figure (DSB): 13.1 dB/12.4 dB
Voltage conversion gain: 1.0 dB/4.3 dB
Quadrature demodulation accuracy
Phase accuracy: <0.5°
Amplitude accuracy: <0.1 dB
Baseband demodulation: 170 MHz/135 MHz, 3 dB
bandwidth
SPI serial interface for PLL programming
40-lead, 6 mm × 6 mm LFCSP
APPLICATIONS
QAM/QPSK RF/IF demodulators
Cellular W-CDMA/CDMA/CDMA2000
Microwave point-to-(multi)point radios
Broadband wireless and WiMAX
The ADRF6807 is a high dynamic range IQ demodulator with
integrated phase-locked loop (PLL) and voltage controlled
oscillator (VCO). The fractional-N PLL/synthesizer generates a
frequency in the range of 2.8 GHz to 4.2 GHz. A programmable
quadrature divider (divide ratio = 4) divides the output frequency
of the VCO down to the required local oscillator (LO) frequency to
drive the mixers in quadrature. Additionally, an output divider
(divide ratio = 4 to 8) generates a divided-down VCO signal for
external use.
The PLL reference input is supported from 9 MHz to 160 MHz.
The phase detector output controls a charge pump whose output
is integrated in an off-chip loop filter. The loop filter output is
then applied to an integrated VCO.
The IQ demodulator mixes the differential RF input with the
complex LO derived from the quadrature divider. The differential
I and Q output paths have excellent quadrature accuracy and
can handle baseband signaling or complex IF up to 120 MHz.
A reduced power mode of operation is also provided by
programming the serial interface registers to reduce current
consumption, with slightly degraded input linearity and output
current drive.
The ADRF6807 is fabricated using an advanced silicon-germanium
BiCMOS process. It is available in a 40-lead, exposed paddle,
RoHS-compliant, 6 mm × 6 mm LFCSP package. Performance is
specified over the −40°C to +85°C temperature range.
LON 37
LOP 38
GND 11
DATA 12
CLK 13
LE 14
GND 15
REFIN 6
GND 7
MUXOUT 8
GND VCCLO VCCLO
35 34
17
FUNCTIONAL BLOCK DIAGRAM
LOSEL
36
BUFFER
CTRL
BUFFER
DIV
÷4,
÷6,
÷8
ADRF6807
FRACTION
REG
MODULUS
INTEGER
REG
BUFFER
MUX
DIVIDER
÷2
IBBP
33
IBBN GND
32 31
30 GND
29 DECL3
28 VCCRF
27 GND
SPI
INTERFACE
×2
MUX
÷2
÷4
THIRD-ORDER
FRACTIONAL
INTERPOLATOR
N COUNTER
PRESCALER
÷2
VCO
CORE
QUAD
÷2
26 RFIN
25 RFIP
TEMP
SENSOR
–
+
PHASE
FREQUENCY
DETECTOR
CHARGE PUMP
250µA,
500µA (DEFAULT),
750µA,
1000µA
2.5V LDO
VCO LDO
24 GND
23 VOCM
22 VCCBB
21 GND
1
VCC1
2
VCC1
34
5
9 10 39
40
16
CPOUT GND RSET DECL2 VCC2 VTUNE DECL1 GND
18 19 20
QBBP QBBN GND
Figure 1.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2011–2012 Analog Devices, Inc. All rights reserved.
Free Datasheet http://www.datasheet4u.com/
1 page  
Data Sheet
Parameter
POWER SUPPLIES
Voltage Range (3.3 V)
Voltage Range (5 V)
Supply Current (3.3 V) (LPEN = 0)
Supply Current (5 V) (LPEN = 0)
Supply Current (3.3 V) (LPEN = 1)
Supply Current (5 V) (LPEN = 1)
Supply Current (5 V)
Supply Current (3.3 V)
Test Conditions/Comments
VCC1, VCC2, VCCLO, VCCBB, VCCRF pins
VCC1, VCC2, VCCLO
VCCBB, VCCRF
Normal Rx mode
Rx mode with LO buffer enabled
Normal Rx mode
Rx mode with LO buffer enabled
Normal Rx mode
Rx mode with LO buffer enabled
Normal Rx mode
Rx mode with LO buffer enabled
Power-down mode
Power-down mode
ADRF6807
Min Typ
3.135
4.75
3.3
5
170
227
86
86
166
214
76
76
10
15
Max Unit
3.465
5.25
V
V
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
TIMING CHARACTERISTICS
VS1 (VVCCBB and VVCCRF) = 5 V, and VS2 (VVCC1, VVCC2, and VVCCLO) = 3.3 V.
Table 2.
Parameter
t1
t2
t3
t4
t5
t6
t7
Limit at TMIN to TMAX
20
10
10
25
25
10
20
Unit
ns min
ns min
ns min
ns min
ns min
ns min
ns min
Test Conditions/Comments
LE setup time
DATA to CLK setup time
DATA to CLK hold time
CLK high duration
CLK low duration
CLK to LE setup time
LE pulse width
CLK
t4 t5
DATA
DB23 (MSB)
t2 t3
DB22
DB2
(CONTROL BIT C3)
DB1
(CONTROL BIT C2)
LE
t1
LE
Figure 2. Timing Diagram
DB0 (LSB)
(CONTROL BIT C1)
t7
t6
Rev. B | Page 5 of 36
Free Datasheet http://www.datasheet4u.com/
5 Page 
Data Sheet
0
–2
–4
–6
–8
–10
–12
–14
–16
–18
–20
–22
–24
–26
–28
–30
700 750 800 850 900 950 1000 1050
725 775 825 875 925 975 1025
RF FREQUENCY (MHz)
Figure 16. RF Input Return Loss vs. RF Frequency,
Measured Through ADTL2-18 2-to-1 Input Balun
0
–2
–4
–6
–8
–10
–12
–14
–16
–18
–20
–22
–24
–26
–28
–30
350 400 450 500 550 600 650 700 750 800 850 900 950 10001050
LO OUTPUT FREQUENCY (MHz)
Figure 17. LO Output Return Loss vs. LO Output Frequency,
LO Output Enabled (350 MHz to 1050 MHz)
260
T = +85°C
T = +25°C
235 T = –40°C
LPEN = 0
210 LPEN = 1
185
3.3V SUPPLY
160
135
110
5V SUPPLY
85
60
700 750 800 850 900 950 1000 1050
725 775 825 875 925 975 1025
LO FREQUENCY (MHz)
Figure 18. 5 V and 3.3 V Supply Currents vs. LO Frequency,
LO Output Disabled
ADRF6807
2.0
LPEN = 0
1.9 LPEN = 1
1.8
1.7
1.6
1.5
1.4
1.3
1.2
–40
–20 0 20 40 60
TEMPERATURE (°C)
Figure 19. VPTAT Voltage vs. Temperature
80
3.5
TA = +85°C
TA = +25°C
3.0 TA = –40°C
2.5
2.0
1.5
1.0
0.5
350 370 390 410 430 450 470 490 510
LO FREQUENCY (MHz)
Figure 20. VTUNE Voltage vs. LO Frequency, Measured at the LO Output Pins
with LO Output in Divide-by-8 Mode
Rev. B | Page 11 of 36
Free Datasheet http://www.datasheet4u.com/
11 Page | ||
| Páginas | Total 36 Páginas | |
| PDF Descargar | [ Datasheet ADRF6807.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| ADRF6801 | 750 MHz to 1150 MHz Quadrature Demodulator | Analog Devices |
| ADRF6806 | 50 MHz to 525 MHz Quadrature Demodulator | Analog Devices |
| ADRF6807 | 700 MHz to 1050 MHz Quadrature Demodulator | Analog Devices |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |