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IS-1825ASRH 반도체 회로 부품 판매점

Dual Output PWMs



Intersil 로고
Intersil
IS-1825ASRH 데이터시트, 핀배열, 회로
®
Data Sheet
IS-1825ASRH, ISL71823ASRH
September 25, 2008
FN9065.3
Single Event and Total Dose Hardened,
High-Speed, Dual Output PWMs
The single event and total dose hardened IS-1825ASRH and
ISL71823ASRH pulse width modulators are designed to be
used in high frequency, switching power supplies in either
voltage or current-mode configurations. Both designs
include a precision voltage reference, a low power start-up
circuit, a high frequency oscillator, a wide-band error
amplifier and a fast current-limit comparator.
The IS-1825ASRH features dual, alternating outputs
operating from zero to less than 50% duty-cycle, while the
ISL71823ASRH features dual, in-phase outputs operating
from zero to less than 100% duty cycle.
Constructed with the Intersil Rad-hard Silicon Gate (RSG)
dielectrically isolated BiCMOS process, these devices are
immune to single event latch-up and have been specifically
designed to provide a high level of immunity to single event
transients. All specified parameters are guaranteed and
tested for 300krad(Si) total dose performance.
Detailed Electrical Specifications for these devices are
contained in SMD 5962-02511. A “hot-link” is provided
on our website for downloading the SMD.
Pinouts
IS1-1825ASRH, ISL71823ASRHQD
(CDIP2-T16 SBDIP)
TOP VIEW
INV 1
NON-INV 2
E/A OUT 3
CLK/LEB 4
RT 5
CT 6
RAMP 7
SS 8
16 VREF
15 VCC
14 OUT B
13 VC
12 PGND
11 OUT A
10 GND
9 ILIM/SD
Features
• Electrically Screened to DSCC SMD # 5962-02511
• QML Qualified per MIL-PRF-38535 Requirements
• Radiation Environment
- Total Dose. . . . . . . . . . . . . . . . . . . . . 300krad(SI) (max)
- Latch-up Immune . . . . . . . . . . . . . Dielectrically Isolated
- SEU immune . . . . . . . . . . LET = 35MeV/mg/cm2(max)
• Oscillator Frequency . . . . . . . . . . . . . . . . . . . .1MHz(max)
• High Output Drive Current . . . . . . . . . . . . . . .1A peak(typ)
• Low Start-up Current . . . . . . . . . . . . . . . . . . . 300µA(max)
• Undervoltage Lockout
- Start Threshold . . . . . . . . . . . . . . . . . . . . . . . .8.8V(max)
- Stop Threshold . . . . . . . . . . . . . . . . . . . . . . . . 7.6V(min)
- Hysteresis. . . . . . . . . . . . . . . . . . . . . . . . . . 300mV(min)
• Improved Soft-Start Function Compared with Commercial
1825A/1823A Types
• Pulse-by-Pulse Current Limiting
• Latched Overcurrent Comparator with Full Cycle Restart
• Programmable Leading Edge Blanking
Applications
• Voltage or Current-Mode Switching Power Supplies
• Control of High Current MOSFET Drivers
• Motor Speed and Direction Control
NC
INV
NON-INV
E/A OUT
CLK/LEB
RT
CT
RAMP
SS
NC
IS9-1825ASRH, ISL71823ASRHQF
(CDFP4-F20 FLATPACK)
TOP VIEW
1 20
2 19
3 18
4 17
5 16
6 15
7 14
8 13
9 12
10 11
VREF
VCC
OUT B
PGND
VC
VC
PGND
OUT A
GND
ILIM/SD
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002, 2005, 2008. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
Free Datasheet http://www.datasheet4u.com/


IS-1825ASRH 데이터시트, 핀배열, 회로
IS-1825ASRH, ISL71823ASRH
Ordering Information
ORDERING NUMBER
IS0-1825ASRH/SAMPLE
5962F0251101V9A
5962F0251101QEC
5962F0251101QXC
5962F0251101VEC
5962F0251101VXC
IS1-1825ASRH/Proto
IS9-1825ASRH/Proto
5962F0251102QEC
5962F0251102QXC
5962F0251102VEC
5962F0251102VXC
ISL71823ASRHD/Proto
ISL71823ASRHF/Proto
INTERNAL
MKT. NUMBER
IS0-1825ASRH/SAMPLE
IS0-1825ASRH-Q
IS1-1825ASRH-8
IS9-1825ASRH-8
IS1-1825ASRH-Q
IS9-1825ASRH-Q
IS1-1825ASRH/Proto
IS9-1825ASRH/Proto
ISL71823ASRHQD
ISL71823ASRHQF
ISL71823ASRHVD
ISL71823ASRHVF
ISL71823ASRHD/Proto
ISL71823ASRHF/Proto
Typical Performance Curves
10k
C220pF
C470pF
C1000pF
1k C2200pF
C4700pF
100
C10nF
10 C22nF
1
10
100
Rt TIMING RESISTANCE (kΩ)
FIGURE 1. OSCILLATOR FREQUENCY vs Rt and Ct
TEMP. RANGE (°C)
PACKAGE
-50 to +125
-50 to +125
-50 to +125
16 Ld SBDIP
-50 to +125
20 Ld Flatpack
-50 to +125
16 Ld SBDIP
-50 to +125
20 Ld Flatpack
-50 to +125
16 Ld SBDIP
-50 to +125
20 Ld Flatpack
-50 to +125
16 Ld SBDIP
-50 to +125
20 Ld Flatpack
-50 to +125
16 Ld SBDIP
-50 to +125
20 Ld Flatpack
-50 to +125
16 Ld SBDIP
-50 to +125
20 Ld Flatpack
PKG DWG. #
D16.3
K20.A
D16.3
K20.A
D16.3
K20.A
D16.3
K20.A
D16.3
K20.A
D16.3
K20.A
100
DMAX
90
80
70
60
50 1
10
Rt TIMING RESISTANCE (kΩ)
FIGURE 2. MAXIMUM DUTY CYCLE vs Rt
100
2 FN9065.3
September 25, 2008
Free Datasheet http://www.datasheet4u.com/




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Dual Output PWMs - Intersil