BU-61570 반도체 회로 부품 판매점
(BU-61580 - BU-61585) MIL-STD-1553A/B NOTICE 2 RT and BC/RT/MT
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 DDC |
BU-65170/61580 and BU-61585
MIL-STD-1553A/B NOTICE 2 RT and BC/RT/MT,
ADVANCED COMMUNICATION ENGINE (ACE)
ACE User’s Guide
Also Available
DESCRIPTION
DDC's BU-65170, BU-61580 and
BU-61585 Bus Controller / Remote
Terminal / Monitor Terminal
(BC/RT/MT)
Advanced
Communication Engine (ACE) termi-
nals comprise a complete integrated
interface between a host processor
and a MIL-STD-1553 A and B or
STANAG 3838 bus.
configured as 12K x 16 or 8K x 17.
The 8K x 17 RAM feature provides
capability for memory integrity check-
ing by implementing RAM parity gen-
eration and verification on all access-
es. To minimize board space and
“glue” logic, the ACE provides ultimate
flexibility in interfacing to a host
processor and internal/external RAM.
The ACE series is packaged in a 1.9 -
square-inch, 70-pin, low-profile,
cofired MultiChip Module (MCM)
ceramic package that is well suited for
applications with stringent height
requirements.
The BU-61585 ACE integrates dual
transceiver, protocol, memory man-
agement, processor interface logic,
and a total of 12K words of RAM in a
choice of DIP or flat pack packages.
The BU-61585 requires +5 V power
and either -15 V or -12 V power.
The BU-61585 internal RAM can be
The advanced functional architecture
of the ACE terminals provides soft-
ware compatibility to DDC's
Advanced Integrated Multiplexer (AIM)
series hybrids, while incorporating a
multiplicity of architectural enhance-
ments. It allows flexible operation
while off-loading the host processor,
ensuring data sample consistency,
and supports bulk data transfers.
The ACE hybrids may be operated at
either 12 or 16 MHz. Wire bond
options allow for programmable RThttp://www.DataSheet4U.net/
address (hardwired is standard) and
external transmitter inhibit inputs.
FEATURES
• Fully Integrated MIL-STD-1553
Interface Terminal
• Flexible Processor/Memory
Interface
• Standard 4K x 16 RAM and
Optional 12K x 16 or 8K x 17 RAM
Available
• Optional RAM Parity
Generation/Checking
• Automatic BC Retries
• Programmable BC Gap Times
• BC Frame Auto-Repeat
• Flexible RT Data Buffering
• Programmable Illegalization
• Selective Message Monitor
• Simultaneous RT/Monitor Mode
CH. A
TX/RX_A
TRANSCEIVER
A
TX/RX_A
TX/RX_B
DUAL
ENCODER/DECODER,
MULTIPROTOCOL
AND
MEMORY
MANAGEMENT
*SHARED
RAM
DATA BUS
ADDRESS BUS
DATA
BUFFERS
ADDRESS
BUFFERS
D15-D0
A15-A0
PROCESSOR
DATA BUS
PROCESSOR
ADDRESS BUS
CH. B
TRANSCEIVER
B
RT ADDRESS
MISCELLANEOUS
TX/RX_B
RTAD4-RTAD0, RTADP
INCMD
PROCESSOR
AND
MEMORY
INTERFACE
LOGIC
TRANSPARENT/BUFFERED, STRBD, SELECT,
RD/WR, MEM/REG, TRIGGER_SEL/MEMENA-IN,
MSB/LSB/DTGRT
IOEN, MEMENA-OUT, READYD
ADDR_LAT/MEMOE, ZERO_WAIT/MEMWR,
8/16-BIT/DTREQ, POLARITY_SEL/DTACK
PROCESSOR
AND
MEMORY
CONTROL
CLK_IN, TAG_CLK,
MSTCLR,SSFLAG/EXT_TRG
INT INTERRUPT
REQUEST
* SEE ORDERING INFORMATION FOR AVAILABLE MEMORY
FIGURE 1. ACE BLOCK DIAGRAM
© 1992, 1999 Data Device Corporation
datasheet pdf - http://www.DataSheet4U.net/
TABLE 1. “ACE” SERIES SPECIFICATIONS
PARAMETER
ABSOLUTE MAXIMUM RATING
Supply Voltage
! Logic +5V
! Transceiver +5V
! -15V
! -12V
Logic
! Voltage Input Range
MIN TYP MAX UNITS
-0.3
-0.3
-18.0
-18.0
-0.3
7.0
7.0
0.3
0.3
Vcc+0.3
V
V
V
V
V
RECEIVER
Differential Input Resistance
! (BU-65170/61580/61585X1,
BU-65170/61580/61585X2)
(Notes 1-7)
! (BU-65170/61580/61585X3,
BU-65170/61580/61585X6)
(Notes 1-7)
Differential Input Capacitance
! (BU-65170/61580/61585X1,
BU-65170/61580/61585X2)
(Notes 1-7)
! (BU-65170/61580/61585X3,
BU-65170/61580/61585X6)
(Notes 1-7)
Threshold Voltage, Transformer
Coupled, Measured on Stub
Common Mode Voltage (Note 7)
11
2.5
0.200
kΩ
kΩ
10 pF
5 pF
0.860 Vp-p
10 Vpeak
TRANSMITTER
Differential Output Voltage
! Direct Coupled Across 35 Ω, 6 7 9 Vp-p
Measured on Bus
! Transformer Coupled Across
70 Ω, Measured on Bus
•(BU-65170/61580/61585X1)
20
27 Vp-p
•(BU-65170/61580/61585X2,X3, X6) 18
27 Vp-p
Output Noise, Differential (Direct
10 mVp-p,
Coupled)
diff
Output Offset Voltage, Transformer -250
250 mV
Coupled Across 70 ohms
Rise/Fall Time
100 150 300 nsec
LOGIC
VIH
VIL
IIH (Vcc=5.5V, VIN=Vcc)
IIH (Vcc=5.5V, VIN=2.7V)
! SSFLAG/EXT_TRIG
! All Other Inputs
IIL (Vcc=5.5V, VIN=0.4V)
! SSFLAG/EXT_TRIG
! All Other Inputs
VOH (Vcc=4.5V, VIH=2.7V,
VIL=0.2V, IOH=max)
VOL (Vcc=4.5V, VIH=2.7V,
VIL=0.2V, IOL=max)
IOL
! DB15-DB0, A15-A0, MEMOE/
ADDR_LAT, MEMWR/
ZEROWAIT, DTREQ/16/8,
DTACK/POLARITY_SEL
2.0
-10
-692
-346
-794
-397
2.4
6.4
0.8
10
-84
-42
-100
-50
0.4
V
V
µA
µA
µA
µA
µA
V
V
mA
TABLE 1. “ACE” SERIES SPECIFICATIONS (CONTD)
PARAMETER
MIN TYP MAX UNITS
LOGIC (cont’d)
! INCMD, INT MEMENA_OUT,
READYD, IOEN, TXA, TXA,
TXB, TXB, TX_INH_OUT_A,
TX_INH_OUT_B,
IOH
! DB15-DB0, A15-A0, MEMOE/
ADDR_LAT, MEMWR/
ZEROWAIT, DTREQ/16/8,
DTACK/POLARITY_SEL
! INCMD, INT, MEMENA_OUT,
READYD, IOEN, TXA, TXA,
TXB, TXB, TX_INH_OUT_A,
TX_INH_OUT_B,
CI (Input Capacitance)
CIO (Bi-directional signal input
capacitance)
3.2
mA
-6.4 mA
-3.2 mA
50 pF
50 pF
POWER SUPPLY REQUIREMENTS
Voltages/Tolerances
! BU-65170/61580/61585X1
• +5V (Logic)
• +5V (Ch. A, Ch. B)
• -15V (Ch. A, Ch. B)
! BU-65170/61580/61585X2
• +5V (Logic)
• +5V (Ch. A, Ch. B)
• -12V (Ch. A, Ch. B)
! BU-65170/61580/61585X3,
BU-65170/61580/61585X6
• +5V (Logic)
• +5V (Ch. A, Ch. B)
Current Drain (Total Hybrid)
! BU-65170/61580X1
• +5V (Logic, Ch. A, Ch. B)http://www.DataSheet4U.net/
• -15V (Ch. A, Ch. B)
• Idle
• 25% Transmitter Duty Cycle
• 50% Transmitter Duty Cycle
• 100% Transmitter Duty Cycle
! BU-65170/61580X2
• +5V (Logic, Ch. A, Ch. B)
• -12V (Ch. A, Ch. B)
• Idle
• 25% Transmitter Duty Cycle
• 50% Transmitter Duty Cycle
• 100% Transmitter Duty Cycle
! BU-65170/61580X3,
BU-65170/61580X6
• +5V (Logic, Ch. A, Ch. B)
• Idle
• 25% Transmitter Duty Cycle
• 50% Transmitter Duty Cycle
• 100% Transmitter Duty Cycle
! BU-61585X1
• +5V (Logic, Ch. A, Ch. B)
• -15V (Ch. A, Ch. B)
• Idle
• 25% Transmitter Duty Cycle
• 50% Transmitter Duty Cycle
• 100% Transmitter Duty Cycle
4.5 5.0 5.5
4.5 5.0 5.5
-15.75 -15.0 -14.25
4.5 5.0 5.5
4.5 5.0 5.5
-12.6 -12.0 -11.4
4.5 5.0 5.5
4.75 5.0 5.25
95 190
30 60
68 108
105 160
180 255
95 190
30 60
80 120
130 185
230 305
95 200
245 350
360 500
590 800
105 240
30 60
68 108
105 160
180 255
V
V
V
V
V
V
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
Data Device Corporation
www.ddc-web.com
2
BU-65170/61580/61585
H1 web-09/02-0
datasheet pdf - http://www.DataSheet4U.net/
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BU-61570 data
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관련 데이터시트
BU-61570
(BU-61580 - BU-61585) MIL-STD-1553A/B NOTICE 2 RT and BC/RT/MT - DDC
BU-61571
(BU-61580 - BU-61585) MIL-STD-1553A/B NOTICE 2 RT and BC/RT/MT - DDC