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NEC |
DATA SHEET
MOS FIELD EFFECT TRANSISTOR
2SK3116
SWITCHING
N-CHANNEL POWER MOS FET
DESCRIPTION
The 2SK3116 is N-channel DMOS FET device that features a
low gate charge and excellent switching characteristics, and
designed for high voltage applications such as switching power
supply, AC adapter.
FEATURES
•Low gate charge
QG = 26 nC TYP. (ID = 7.5 A, VDD = 450 V, VGS = 10 V)
•Gate voltage rating ±30 V
•Low on-state resistance
RDS(on) = 1.2 Ω MAX. (VGS = 10 V, ID = 3.75 A)
•Avalanche capability ratings
ORDERING INFORMATION
PART NUMBER
2SK3116
2SK3116-S
2SK3116-ZJ
PACKAGE
TO-220AB
TO-262
TO-263
ABSOLUTE MAXIMUM RATINGS (TA = 25°C)
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Drain to Source Voltage (VGS = 0 V) VDSS
600 V
Gate to Source Voltage (VDS = 0 V) VGSS
±30 V
Drain Current (DC)
Drain Current (pulse) Note1
ID(DC)
ID(pulse)
±7.5 A
±30 A
Total Power Dissipation (TA = 25°C) PT1
1.5 W
Total Power Dissipation (TC = 25°C) PT2
70 W
Channel Temperature
Tch 150 °C
Storage Temperature
Single Avalanche Current Note2
Single Avalanche Energy Note2
Diode Recovery dv/dt Note3
Tstg
IAS
EAS
dv/dt
−55 to +150
7.5
37.5
3.5
°C
A
mJ
V/ns
Notes 1. PW ≤ 10 µs, Duty Cycle ≤ 1%
2. Starting Tch = 25°C, VDD = 150 V, RG = 25 Ω , VGS = 20 → 0 V
3. IF ≤ 3.0 A, Vclamp = 600 V, di/dt ≤ 100 A/ µs, TA = 25°C
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. D13339EJ2V0DS00 (2nd edition)
Date Published May 2002 NS CP (K)
Printed in Japan
The mark 5 shows major revised points.
©
1998
Datasheet pdf - http://www.DataSheet4U.net/
2SK3116
ELECTRICAL CHARACTERISTICS (TA = 25°C)
CHRACTERISTICS
SYMBOL
TEST CONDITIONS
Zero Gate Voltage Drain Current
IDSS VDS = 600 V, VGS = 0 V
Gate Leakage Current
IGSS VGS = ±30 V, VDS = 0 V
Gate Cut-off Voltage
Forward Transfer Admittance
Drain to Source On-state Resistance
VGS(off)
| yfs |
RDS(on)
VDS = 10 V, ID = 1 mA
VDS = 10 V, ID = 3.75 A
VGS = 10 V, ID = 3.75 A
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
Total Gate Charge
Gate to Source Charge
Gate to Drain Charge
Body Diode Forward Voltage
Reverse Recovery Time
Ciss
Coss
Crss
td(on)
tr
td(off)
tf
QG
QGS
QGD
VF(S-D)
Trr
VDS = 10 V
VGS = 0 V
f = 1 MHz
VDD = 150 V, ID = 3.75 A
VGS = 10 V
RG = 10 Ω
RL = 50 Ω
VDD = 450 V
VGS = 10 V
ID = 7.5 A
IF = 7.5 A, VGS = 0 V
IF = 7.5 A, VGS = 0 V
Reverse Recovery Charge
Qrr di/dt = 50 A/ µs
MIN.
2.5
2.0
TYP.
0.9
1100
200
20
18
15
50
15
26
6
10
1.0
1.6
7.6
MAX.
100
±100
3.5
1.2
UNIT
µA
nA
V
S
Ω
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
V
µs
µC
TEST CIRCUIT 1 AVALANCHE CAPABILITY
D.U.T.
RG = 25 Ω
PG.
VGS = 20 → 0 V
50 Ω
L
VDD
ID
VDD
IAS
BVDSS
VDS
Starting Tch
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
IG = 2 mA
PG. 50 Ω
RL
VDD
TEST CIRCUIT 2 SWITCHING TIME
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D.U.T.
PG.
RG
RG = 10 Ω
VGS
0
τ
τ = 1 µs
Duty Cycle ≤ 1%
RL
VDD
VGS
VGS
Wave Form
10%
0
ID
VGS
90%
ID
Wave Form
0 10%
td(on)
ID
tr td(off)
90%
90%
10%
tf
ton toff
2 Data Sheet D13339EJ2V0DS
Datasheet pdf - http://www.DataSheet4U.net/
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