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PDF LE24CB642 Data sheet ( Hoja de datos )

Número de pieza LE24CB642
Descripción Two Wire Serial Interface EEPROM
Fabricantes Sanyo Semicon Device 
Logotipo Sanyo Semicon Device Logotipo



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Ordering number : ENA1330A
CMOS IC
LE24CB642 Two Wire Serial Interface EEPROM
(64k EEPROM)
Overview
The LE24CB642 is a 2-wire serial interface EEPROM. It realizes high speed and a high level reliability by incorporating
SANYO’s high performance CMOS EEPROM technology. This device is compatible with I2C memory protocol,
therefore it is best suited for application that requires small-scale re-writable nonvolatile parameter memory.
Functions
Capacity: 64k bits (8k × 8 bits)
Single supply voltage: 2.7V to 5.5V
Interface: Two wire serial interface (I2C Bus*)
Operating clock frequency: 400kHz
Low power consumption
: Standby: 2μA (max)
: Active (Read): 0.5mA (max)
Automatic page write mode: 32 Bytes
Read mode: Sequential read and random read
Erase/Write cycles: 106 cycles (Page writing), 105 cycles (Byte writing)
Data Retention: 20 years
High reliability: Adopts SANYO’s proprietary symmetric memory array configuration (USP6947325)
Noise filters connected to SCL and SDA pins
Incorporates a feature to prohibit write operations under low voltage conditions.
* I2C Bus is a trademark of Philips Corporation.
* This product is licensed from Silicon Storage Technology, Inc. (USA), and manufactured and sold by
SANYO Semiconductor Co., Ltd.
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to
"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,
communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be
intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace
instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety
equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case
of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee
thereof. If you should intend to use our products for applications outside the standard applications of our
customer who is considering such use and/or outside the scope of our intended standard applications, please
consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our
customer shall be solely responsible for the use.
Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate
the performance, characteristics, and functions of the described products in the independent state, and are not
guarantees of the performance, characteristics, and functions of the described products as mounted in the
customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent
device, the customer should always evaluate and test devices mounted in the customer's products or
equipment.
10511 SY/O1508 SY 20080917-S00004 No.1330-1/12
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LE24CB642 pdf
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Pin Functions
LE24CB642
SCL (serial clock input) pin
The SCL pin is a serial clock input pin that processes signals at the rising and falling edges of SCL clock signals.
SDA (serial data input/output) pin
The SDA pin is used to transfer serial data to the input/output, and it consists of a signal input pin and n-channel
transistor open drain output pin.
Like the SCL pin, the SDA pin must be pulled up by a resistor to the VDD level and wired-ORed with an open drain
(or open collector) output device for use.
WP (write protect) pin
When the WP pin is high, write protection is enabled, and writing into the 64k bit memory areas is prohibited. When
the pin is low, writing is possible to all memory areas. Read operations can be performed regardless of the WP pin
status.
Functional Description
1 Start condition
When the SCL line is at the high level, the start condition is established by changing the SDA line from high to low.
The operation of the EEPROM as a slave starts in the start condition.
2 Stop condition
When the SCL line is at the high level, the stop condition is established by changing the SDA line from low to high.
When the device is set up for the read sequence, the read operation is suspended when the stop condition is received,
and the device is set to standby mode. When it is set up for the write sequence, the capture of the write data is ended
when the stop condition is received, and the EEPROM internal write operation is started.
tSU.STA tHD.STA
tSU.STO
SCL
SDA
Start
condition
Stop
condition
3 Data transfer
Data is transferred by changing the SDA line while the SCL line is low. When the SDA line is changed while the SCL
line is high, the resulting condition will be recognized as the start or stop condition.
tSU.DAT
tHD.DAT
SCL
SDA
No.1330-5/12
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LE24CB642 arduino
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LE24CB642
3) Notes on write protect operation
This product prohibits all 64k bit writing when the WP pin is high. To ensure full write protection, the WP is set high
for all periods from the start condition to the stop condition, and the conditions below must be satisfied.
WP Setup time
WP Hold time
Item
Symbol
tSU.WP
tHD.WP
VDD=2.7 to 5.5V
min typ
600
600
max
unit
ns
ns
WP
SCL
SDA
tSU.WP
Start condition
tHD.WP
Stop condition
4) Precautions when turning on the power
This product contains a power-on reset circuit for preventing the inadvertent writing of data when the power is
turned on. The following conditions must be met in order to ensure stable operation of this circuit. No data
guarantees are given in the event of an instantaneous power failure during the internal write operation.
Item
Power rise time
Power off time
Power bottom voltage
Symbol
tRISE
tOFF
Vbot
VDD=2.7 to 5.5V
min typ
10
max
100
0.2
unit
ms
ms
V
VDD
tRISE
tOFF
Vbot
0V
Notes:
1) The SDA pin must be set to high and the SCL pin to low or high.
2) Steps must be taken to ensure that the SDA and SCL pins are not placed in a high-impedance state.
No.1330-11/12
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