파트넘버.co.kr ISL23445 데이터시트 PDF


ISL23445 반도체 회로 부품 판매점

Low Voltage Digitally Controlled Potentiometer



Intersil Corporation 로고
Intersil Corporation
ISL23445 데이터시트, 핀배열, 회로
www.DataSheet.co.kr
Quad, 256 Tap, Low Voltage Digitally Controlled
Potentiometer (XDCP™)
ISL23445
The ISL23445 is a volatile, low voltage, low noise, low power, 256
tap, quad digitally controlled potentiometer (DCP) with an SPI
Businterface. It integrates four DCP cores, wiper switches
and control logic on a monolithic CMOS integrated circuit.
Each digitally controlled potentiometer is implemented with a
combination of resistor elements and CMOS switches. The
position of the wipers are controlled by the user through the
SPI bus interface. Each potentiometer has an associated
volatile Wiper Register (WRi, i = 0, 1, 2, 3) that can be directly
written to and read by the user. The contents of the WRi
controls the position of the wiper. When powered on, the wiper
of each DCP will always commence at mid-scale (128 tap
position).
The low voltage, low power consumption, and small package
of the ISL23445 make it an ideal choice for use in battery
operated equipment. In addition, the ISL23445 has a VLOGIC
pin allowing down to 1.2V bus operation, independent from the
VCC value. This allows for low logic levels to be connected
directly to the ISL23445 without passing through a voltage
level shifter.
The DCP can be used as a three-terminal potentiometer or as a
two-terminal variable resistor in a wide variety of applications
including control, parameter adjustments, and signal processing.
Applications
• Power supply margining
• Trimming sensor circuits
• Gain adjustment in battery powered instruments
• RF power amplifier bias compensation
Features
• Four potentiometers per package
• 256 resistor taps
• 10kΩ, 50kΩ or 100kΩ total resistance
• SPI serial interface
- No additional level translator for low bus supply
- Daisy Chaining of multiple DCPs
• Maximum supply current without serial bus activity
(standby)
- 5µA @ VCC and VLOGIC = 5V
- 2uA @ VCC and VLOGIC = 1.7V
• Shutdown Mode
- Forces the DCP into an end-to-end open circuit and RWi is
connected to RLi internally
- Reduces power consumption by disconnecting the DCP
resistor from the circuit
• Power supply
- VCC = 1.7V to 5.5V analog power supply
- VLOGIC = 1.2V to 5.5V SPI bus/logic power supply
• Wiper resistance: 70Ω typical @ VCC = 3.3V
• Power-on preset to mid-scale (128 tap position)
• Extended industrial temperature range: -40°C to +125°C
• 20 Ld TSSOP or 20 Ld QFN packages
• Pb-free (RoHS compliant)
10000
8000
6000
4000
2000
0
0 64 128 192
TAP POSITION (DECIMAL)
FIGURE 1. FORWARD AND BACKWARD RESISTANCE vs TAP
POSITION, 10kDCP
256
VREF
RH1
1 DCP
of
ISL23445
RW1
RL1
-
+
ISL28114
VREF_M
FIGURE 2. VREF ADJUSTMENT
June 21, 2011
FN7874.0
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 |Copyright Intersil Americas Inc. 2011. All Rights Reserved
Intersil (and design) and XDCP are trademarks owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners
Datasheet pdf - http://www.DataSheet4U.net/


ISL23445 데이터시트, 핀배열, 회로
www.DataSheet.co.kr
ISL23445
Block Diagram
VLOGIC
SDI
SDO
SCK
CS
I/O
BLOCK
LEVEL
SHIFTER
Pin Configurations
ISL23445
(20 LD TSSOP)
TOP VIEW
RL0 1
RW0 2
VCC 3
RH0 4
RL1 5
RW1 6
RH1 7
GND 8
VLOGIC 9
SDI 10
20 RL3
19 RW3
18 RH3
17 RL2
16 RW2
15 RH2
14 SCK
13 SDO
12 GND
11 CS
ISL23445
(20 LD QFN)
TOP VIEW
20 19 18 17
VCC 1
RH0 2
RL1 3
RW1 4
RH1 5
GND 6
166 RH3
15 RL2
14 RW2
13 RH2
12 SCK
11 SDO
7 8 9 10
VCC
POWER UP
INTERFACE
CONTROL
AND
STATUS
LOGIC
WR0
VOLATILE
REGISTER
WR1
VOLATILE
REGISTER
WR2
VOLATILE
REGISTER
WR3
VOLATILE
REGISTER
GND
Pin Descriptions
RH0
RW0
RL0
RH1
RW1
RL1
RH2
RW2
RL2
RH3
RW3
RL3
TSSOP
1
2
3
QFN
19
20
1
4
5
6
7
8, 12
9
2
3
4
5
6, 10
7
10 8
11 9
13 11
14 12
15 13
16 14
17 15
18 16
19 17
20 18
SYMBOL
DESCRIPTION
RL0 DCP0 “low” terminal
RW0 DCP0 wiper terminal
VCC Analog power supply.
Range 1.7V to 5.5V
RH0 DCP0 “high” terminal
RL1 DCP1 “low” terminal
RW1 DCP1 wiper terminal
RH1 DCP1 “high” terminal
GND Ground pin
VLOGIC SPI bus /logic supply
Range 1.2V to 5.5V
SDI Logic Pin - Serial bus data input
CS Logic Pin - Active low chip select
SDO Logic Pin - Serial bus data output
(configurable)
SCK Logic Pin - Serial bus clock input
RH2 DCP2 “high” terminal
RW2 DCP2 wiper terminal
RL2 DCP2 “low” terminal
RH3 DCP3 “high” terminal
RW3 DCP3 wiper terminal
RL3 DCP3 “low” terminal
2 FN7874.0
June 21, 2011
Datasheet pdf - http://www.DataSheet4U.net/




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