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PDF YSS920B Data sheet ( Hoja de datos )

Número de pieza YSS920B
Descripción 32-bit DSP Engine
Fabricantes YAMAHA 
Logotipo YAMAHA Logotipo



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No Preview Available ! YSS920B Hoja de datos, Descripción, Manual

YSS920B
EVE
32-bit DSP Engine for Various sound Effects
„ Outline
YSS920B is a 32-bit digital signal processor exclusively designed for sound field processing. As a
post-processing DSP after surround sound decoding, YSS920B can process various sound fields such as
various simulation surround and virtual surround through user programs, which can provide wide
variation of sound field effects on audio equipments.
„ Features
YSS920B has following features:
Basic compatibility with the SubDSP section of YSS922/932 for DSP program
High precision processing by 32-bit floating-point operation
Capability to process various sound effects by downloading external programs to the built-in RAM
16 channels processing capability (input: 16ch, output: 16ch)
Zero data detecting function on each channel
32-bit data transmission ability between multiple YSS920Bs
Connectability to most types of ADC, DAC and DIR through control register setting
Built-in delay memory with 32 bits × 1024 words (Max. 21.3 ms at fs = 48 kHz)
Ability to execute up to 2.73 seconds delay (at fs = 48 kHz) when connected with an external DRAM or
SRAM
Support for sampling frequencies from 32 kHz to 192 kHz
DSP section specifications
Internal operating frequency: 30.72 to 50.00 MHz
Data bus width: 32 bits
MAC: 32 bits (floating-point) × 16 bits (fixed-point) + 49 bits 49 bits
Program RAM: 50 bits × 1024 words
Coefficient RAM: 16 bits × 1024 words
Ability to use up to 20 general-purpose input/output terminals
Power supply voltage: 2.5 V (for internal and PLL circuits), 3.3 V (for I/O)
Si-gate CMOS process
Lead-free 100-pin SQFP package:YSS920B-SZ
www.DataSheet4U.com
YSS920B CATALOG
CATALOG No.: LSI-4SS920B21
2006.8

1 page




YSS920B pdf
YSS920B
„ Pin Function
No. Name I/O
Functions
1 VSS
- Digital ground pin
2 XO O Crystal oscillator connecting pin
3 XI I Crystal oscillator connecting pin (12.288 to 15.000 MHz)
4 IOPORT0 I+/O General-purpose input/output pin / SDO 0 Lch zero-flag output pin / Program branch condition
input/output pin
5 IOPORT1 I+/O General-purpose input/output pin / SDO 0 Rch zero-flag output pin / Program branch condition
input/output pin
6 IOPORT2 I+/O General-purpose input/output pin / SDO 1 Lch zero-flag output pin / Program branch condition
input/output pin
7 IOPORT3 I+/O General-purpose input/output pin / SDO 1 Rch zero-flag output pin / Program branch condition
input/output pin
8 IOPORT4 I+/O General-purpose input/output pin / SDO 2 Lch zero-flag output pin / Program branch condition
input/output pin
9 IOPORT5 I+/O General-purpose input/output pin / SDO 2 Rch zero-flag output pin / Program branch condition
input/output pin
10 IOPORT6 I+/O General-purpose input/output pin / SDO 3 Lch zero-flag output pin / Program branch condition
input/output pin
11 IOPORT7 I+/O General-purpose input/output pin / SDO 3 Rch zero-flag output pin / Program branch condition
input/output pin
12 AVSS
- Analog ground pin (for PLL)
13 CPO
A PLL filter connection pin
14 AVDD - +2.5 V analog power supply pin (for PLL)
15 VDD1
- +3.3 V digital power supply pin (for input/output pin)
16 (NC)
- (No connection)
17 IOPORT8 I+/O General-purpose input/output pin / SDO 4 Lch zero-flag output pin
18 IOPORT9 I+/O General-purpose input/output pin / SDO 4 Rch zero-flag output pin
19 IOPORT10 I+/O General-purpose input/output pin / SDO 5 Lch zero-flag output pin
20 IOPORT11 I+/O General-purpose input/output pin / SDO 5 Rch zero-flag output pin
21 IOPORT12 I+/O General-purpose input/output pin / SDO 6 Lch zero-flag output pin / Chip address setting input pin 0
22 IOPORT13 I+/O General-purpose input/output pin / SDO 6 Rch zero-flag output pin / Chip address setting input pin 1
23 IOPORT14 I+/O General-purpose input/output pin / SDO 7 Lch zero-flag output pin / Chip address setting input pin 2
24 IOPORT15 I+/O General-purpose input/output pin / SDO 7 Rch zero-flag output pin / Chip address setting input pin 3
25 VDD2
- +2.5 V digital power supply pin (for internal circuits)
26 VSS
- Digital ground pin
27 SDO0 O PCM output pin
28 SDO1 O PCM output pin
29 SDO2 O PCM output pin
30 SDO3 O PCM output pin
31 SDO4 O PCM output pin
32 SDO5 O PCM output pin
33 SDO6 O PCM output pin
34 SDO7 O PCM output pin
35 IOPORT16 I+/O General-purpose input/output pin / Overflow detection output pin
36 IOPORT17 I+/O General-purpose input/output pin / Program end detection output pin
37 IOPORT18 I+/O General-purpose input/output pin / 64fs clock output pin
38 IOPORT19 I+/O General-purpose input/output pin / fs clock output pin
39 VDD1
- +3.3 V digital power supply pin (for input/output pin)
40 RAMD0 I+/O Data input/output pin for external memory 0
41 RAMD1 I+/O Data input/output pin for external memory 1
42 RAMD2 I+/O Data input/output pin for external memory 2
43 RAMD3 I+/O Data input/output pin for external memory 3
44 RAMD4 I+/O Data input/output pin for external memory 4
45 RAMD5 I+/O Data input/output pin for external memory 5
46 RAMD6 I+/O Data input/output pin for external memory 6
47 RAMD7 I+/O Data input/output pin for external memory 7
48 RAMD8 I+/O Data input/output pin for external memory 8
49 RAMD9 I+/O Data input/output pin for external memory 9
5

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YSS920B arduino
YSS920B
„ Register map
This LSI is controlled by reading/writing the registers below through the microcomputer interface (/CS, SCK,
SI, and SO).
See “Microprocessor interface format” for the microcomputer interface format.
All the registers except addresses 0x13 and 0x14 are reset to 0 when initial clear (/IC=L) is executed. The
initial values of addresses 0x13 and 0x14 are undefined.
Address
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0A
0x0B
0x0C
0x0D
0x0E
0x0F
0x10
0x11
0x12
0x13
0x14
0x15
0x16
0x17
0x18
:
0x1F
0x20
0x21
0x22
0x23
0x24
0x25
0x26
0x27
0x28
0x29
0x2A
0x2B
0x2C
0x2D
0x2E
0x2F
0x30
0x31
Name
CHIP ADR
SDI
SDO
ERAM
IOSEL_H
IOSEL_M
IOSEL_L
OPSEL_H
OPSEL_M
OPSEL_L
OPORT_H
OPORT_M
OPORT_L
IPORT_H
IPORT_M
IPORT_L
MPCNT_H
MPCNT_L
ZEROB
ZEROF_H
ZEROF_L
MI STATE
TEST
TEST
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
CAE
NOEXP
SDIFMT1-0
CA3-0
SDIBIT1-0
SDWP
SDBP
SDOFMT1-0
SDOBIT1-0
WCKOP BCKOP
CKUP
RASREF ERAMMOD ERAMSEL1-0
IOSEL19-16
IOSEL15-8
IOSEL7-0
OPSEL19-16
OPSEL15-8
OPSEL7-0
OPORT19-16
OPORT15-8
OPORT7-0
IPORT19-16
IPORT15-8
IPORT7-0
MPLOAD MPCLEARN DSPMUTEN
MPCNT7-0
MPCNT11-8
ZEROB7-0
ZEROF7R ZEROF7L ZEROF6R ZEROF6L ZEROF5R ZEROF5L ZEROF4R ZEROF4L
ZEROF3R ZEROF3L ZEROF2R ZEROF2L ZEROF1R ZEROF1L ZEROF0R ZEROF0L
MI7S
MI6S
MI5S
MI4S
MI3S
MI2S
MI1S
MI0S
Invalid
Output of SO pin becomes High-Z.
MI00
MI01
MI02
MI03
MI10
MI11
MI12
MI13
MI20
MI21
MI22
MI23
MI30
MI31
MI32
MI33
MI40
MI41
MI0REG31-24
MI0REG23-16
MI0REG15-8
MI0REG7-0
MI1REG31-24
MI1REG23-16
MI1REG15-8
MI1REG7-0
MI2REG31-24
MI2REG23-16
MI2REG15-8
MI2REG7-0
MI3REG31-24
MI3REG23-16
MI3REG15-8
MI3REG7-0
MI4REG31-24
MI4REG23-16
11

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