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Número de pieza | RJK03E3DNS | |
Descripción | Silicon N Channel Power MOS FET | |
Fabricantes | Renesas Technology | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de RJK03E3DNS (archivo pdf) en la parte inferior de esta página. Total 7 Páginas | ||
No Preview Available ! RJK03E3DNS
Silicon N Channel Power MOS FET
Power Switching
Preliminary Datasheetwww.DataSheet4U.com
REJ03G1905-0200
Rev.2.00
Apr 06, 2010
Features
High speed switching
Capable of 4.5 V gate drive
Low drive current
High density mounting
Low on-resistance
RDS(on) = 9.0 m typ. (at VGS = 10 V)
Pb-free
Halogen-free
Outline
RENESAS Package code: PWSN0008JB-A
(Package name: HWSON-8)
5 6 78
5 678
D DDD
4 321
4
G
1, 2, 3 Source
4 Gate
5, 6, 7, 8 Drain
S SS
1 23
Absolute Maximum Ratings
Item
Drain to source voltage
Gate to source voltage
Drain current
Drain peak current
Body-drain diode reverse drain current
Avalanche current
Avalanche energy
Channel dissipation
Channel to case thermal impedance
Channel temperature
Storage temperature
Notes: 1. PW 10 s, duty cycle 1%
2. Value at Tch = 25C, Rg 50
3. Tc = 25C
Symbol
VDSS
VGSS
ID
ID(pulse)Note1
IDR
IAP Note 2
EAR Note 2
Pch Note3
ch-c Note3
Tch
Tstg
Ratings
30
±20
14
56
14
6.5
4.23
10
12.5
150
–55 to +150
(Ta = 25°C)
Unit
V
V
A
A
A
A
mJ
W
C/W
C
C
REJ03G1905-0200 Rev.2.00
Apr 06, 2010
Page 1 of 6
1 page RJK03E3DNS
3
Normalized Transient Thermal Impedance vs. Pulse Width
Preliminary
www.DataSheet4U.com
Vin
15 V
1
D=1
0.5
0.3
0.2
0.1 0.1
0.05
0.03 00.1.00s21hot pulse
0.01
PDM
PW
T
1m
10 m
100 m
Pulse Width PW (S)
D=
PW
T
1 10
Avalanche Test Circuit
VDS
Monitor
Rg
L
IAP
Monitor
D. U. T
VDD
Avalanche Waveform
EAR =
1
2
L • IAP2 •
VDSS
VDSS – VDD
IAP
ID
V(BR)DSS
VDS
VDD
0
Switching Time Test Circuit
Vin Monitor
Rg
D.U.T.
Vout
Monitor
RL
Vin
10 V
VDS
= 10 V
Switching Time Waveform
90%
Vin
Vout
10%
10%
10%
90%
90%
td(on)
tr td(off)
tf
REJ03G1905-0200 Rev.2.00
Apr 06, 2010
Page 5 of 6
5 Page |
Páginas | Total 7 Páginas | |
PDF Descargar | [ Datasheet RJK03E3DNS.PDF ] |
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