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Hynix Semiconductor |
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256MBit MOBILE SDR SDRAMs based on 2M x 4Bank x32 I/O
Specification of
256M (8Mx32bit) Mobile SDRAM
Memory Cell Array
- Organized as 4banks of 2,097,152 x32
This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for
use of circuits described. No patent licenses are implied.
Rev 1.0 / Nov. 2008
1
Document Title
4Bank x 2M x 32bits Synchronous DRAM
Revision History
Revision No.
0.1
0.2
1.0
History
Initial Draft
IDD Specification updated
The final version
11256Mbit (8Mx32bit) Mobile SDR
H55Sw2w6w2.D2aJtaFSRheSeet4rUi.ecsom
H55S2532JFR Series
Draft Date
May 2008
May 2008
Nov. 2008
Remark
Preliminary
Preliminary
Rev 1.0 / Nov. 2008
2
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