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PDF H55S2622JFR-75M Data sheet ( Hoja de datos )
| Número de pieza | H55S2622JFR-75M | |
| Descripción | 256MBit MOBILE SDR SDRAMs based on 2M x 4Bank x32 I/O | |
| Fabricantes | Hynix Semiconductor | |
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256MBit MOBILE SDR SDRAMs based on 2M x 4Bank x32 I/O
Specification of
256M (8Mx32bit) Mobile SDRAM
Memory Cell Array
- Organized as 4banks of 2,097,152 x32
This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for
use of circuits described. No patent licenses are implied.
Rev 1.0 / Nov. 2008
1
1 page  
11256Mbit (8Mx32bit) Mobile SDR
H55Sw2w6w2.D2aJtaFSRheSeet4rUi.ecsom
H55S2532JFR Series
FEATURES
● Standard SDRAM Protocol
● Clock Synchronization Operation
- All the commands registered on positive edge of basic input clock (CLK)
● MULTIBANK OPERATION - Internal 4bank operation
- During burst Read or Write operation, burst Read or Write for a different bank is performed.
- During burst Read or Write operation, a different bank is activated and burst Read or Write for that bank is per-
formed
- During auto precharge burst Read or Write, burst Read or Write for a different bank is performed
● Power Supply Voltage: VDD = 1.8V, VDDQ = 1.8V
● LVCMOS compatible I/O Interface
● Low Voltage interface to reduce I/O power
● Programmable burst length: 1, 2, 4, 8 or full page
● Programmable Burst Type: sequential or interleaved
● Programmable CAS latency of 3 or 2
● Programmable Drive Strength
● Low Power Features
- Programmable PASR(Partial Array Self Refresh)
- Auto TCSR (Temperature Compensated Self Refresh)
- Programmable DS (Drive Strength)
- Deep Power Down Mode
● Operating Temperature
- Mobile Temp.: -30oC ~ 85oC
● Package Type: 90ball FBGA, 0.8mm pitch (Lead & Halogen Free)
● Address Table
Row Address
Column Address
Page Size
A0 ~ A11
A0 ~ A8
2KByte (Normal)
A0 ~ A12
A0 ~ A7
1KByte (Reduced)
Part Number
H55S2622JFR
H55S2532JFR
Rev 1.0 / Nov. 2008
5
5 Page 
11256Mbit (8Mx32bit) Mobile SDR
H55Sw2w6w2.D2aJtaFSRheSeet4rUi.ecsom
H55S2532JFR Series
CAPACITANCE (TA= 25 oC, f=1MHz)
Parameter
Input capacitance
Data input/output capacitance
Pin
CLK
A0~A12, BA0, BA1, CKE, CS, RAS,
CAS, WE, DQM0~3
DQ0 ~ DQ31
Symbol
CI1
CI2
CI/O
6/H/S
Min Max
2 4.0
2 4.0
2 4.5
Unit
pF
pF
pF
DC CHARACTERRISTICS I (TA= -30 to 85oC)
Parameter
Input Leakage Current
Output Leakage Current
Output High Voltage
Output Low Voltage
Symbol
ILI
ILO
VOH
VOL
Min
-1
-1
VDDQ-0.2
-
Note:
1. VIN = 0 to 1.8V. All other pins are not tested under VIN=0V.
2. DOUT is disabled. VOUT= 0 to 1.95V.
3. IOUT = - 0.1mA
4. IOUT = + 0.1mA
Max
1
1
-
0.2
Unit
uA
uA
V
V
Note
1
2
3
4
Rev 1.0 / Nov. 2008
11
11 Page | ||
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| PDF Descargar | [ Datasheet H55S2622JFR-75M.PDF ] | |
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