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Hynix Semiconductor |
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1GBit MOBILE SDR SDRAMs based on 8M x 4Bank x32 I/O
Specification of
1Gb (32Mx32bit) Mobile SDRAM
Memory Cell Array
- Organized as 4banks of 8,388,608 x32
This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for
use of circuits described. No patent licenses are implied.
Rev 1.2 / Jun. 2008
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1Gbit (32Mx32bit) Mobile SDR Memory
H55S1G(2/3)2MFP Series
Document Title
4Bank x 8M x 32bit Synchronous DRAM
Revision History
Revision No.
0.1
0.2
1.0
1.1
1.2
Initial Draft
History
Modify : IDD5 : 100mA --> 120mA
IDD6 (@45oC, Full Bank) : 450uA --> 500uA
Final Version
Modify : IDD6 (@45oC, Full Bank) : 500uA --> 450uA
IDD6 (@85oC, One Bank) : 550uA --> 500uA
Modify : tRAS ( MHz/133Mhz: 42ns/45ns)
Draft Date
Sep. 2007
Jan. 2008
Mar. 2008
May 2008
Jun. 2008
Remark
Preliminary
Preliminary
Rev 1.2 / Jun. 2008
2
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