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Hynix Semiconductor |
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128MBit MOBILE SDR SDRAMs based on 1M x 4Bank x32 I/O
Specification of
128M (4Mx32bit) Mobile SDRAM
Memory Cell Array
- Organized as 4banks of 1,048,576 x32
This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for
use of circuits described. No patent licenses are implied.
Rev 1.0 / Jun. 2008
1
1128Mbit (4Mx32bit) MobwilwewS.DDaRtaSMheeemt4Uo.rcyom
H55S1222EFP Series
Document Title
4Bank x 1M x 32bits Synchronous DRAM
Revision History
Revision No.
0.1
0.2
1.0
Initial Draft
- Define
IDD specification
History
-. Correct
Temp range(p.9)
-. Modify
IDD Values(p.11 & p.12)
Draft Date
Sep. 2007
Feb. 2008
Jun. 2008
Remark
Preliminary
Preliminary
Rev 1.0 / Jun. 2008
2
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