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PDF LC7874E Data sheet ( Hoja de datos )
| Número de pieza | LC7874E | |
| Descripción | CD Graphics Decorder | |
| Fabricantes | Sanyo Semicon Device | |
| Logotipo |  |
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Ordering number : EN5521
CMOS LSI
LC7874E
CD Graphics Decorder
Overview
The LC7874E is a CMOS LSI that provides the signal
processing needed for compact disc graphics (CD-G) on a
single chip. The LC7874E accepts subcode R to W
signals output from a CD player DSP LC786X Series,
LC7862XE Series, or LC7863XE Series device, and
performs de-interleaving, error detection and correction,
graphic instruction processing, and image processing.
Features
• A CD-G decoder can be configured using a three-chip
combination of this LSI—the LC7874E—with external
RAM (64K × 4 bits) and an LC78010E digital RGB
encoder.
• Performs insertion and protection of CD subcode R to
W sync signals and detection of R to W signal de-
interleave error signals.
• Has two crystal oscillators, for NTSC and PAL, with
simple switchover by means of a control pin.
Connecting a crystal resonator of 14.31818 MHz for
NTSC and 17.734476 MHz for PAL enables the
standard clock and other necessary timings to be
generated internally.
• Performs CD graphics instruction processing and
drawing functions, and controls image display.
• Has microcomputer interface functions, allowing set
upgrading.
• Provides superimposition support.
• Has a color bar signal output function.
• DRAM interface and RGB output and sync signal output
are 3-state outputs.
Package Dimensions
unit: mm
3159-QFP64E
[LC7874E]
SANYO: QIP64E
• CCB is a trademark of SANYO ELECTRIC CO., LTD.
• CCB is SANYO’s original bus format and all the bus
addresses are controlled by SANYO.
Specifications
Electrical Characteristics at Ta = –30°C to +85°C
Parameter
Power supply voltage
Input voltage
Output voltage
Allowable power dissipation
Operating temperature
Storage temperature
Symbol
VDD
VIN
VOUT
Pd max
Topr
Tstg
Conditions
Ratings
VDD
S1, S2, SFSY, PW, SBSY, CE, DI, CL, MUTE, DB0 to 3,
VSS – 0.3 to VSS + 7.0
CB, CE1, CE2, CE3, LINE, HRESET, VRESET, INIT,
RESET, N/P, SON, XIN1, XIN2
VSS – 0.3 to VDD + 0.3
SBCK, DO, CDGM, WE, RAS, A0 to 7, DB0 to 3, CAS, OE,
ROUT0 to 3, GOUT0 to 3, BOUT0 to 3, HSYNC, CSYNC,
BLANK, YS, 4FSCO, EFLG, FSCO, XOUT1, XOUT2
VSS – 0.3 to VDD +0 .3
Ta = 25°C
500
–30 to +85
–40 to +125
Unit
V
V
V
mW
°C
°C
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
13097HA(OT) No. 5521-1/22
1 page  
DRAM Read Cycle
LC7874E
No. 5521-5/22
5 Page 
LC7874E
Continued from preceding page.
Pin Pin Symbol
Pin Name
35 HSYNC Horizontal synchronization output pin
36 ROUT3 R data output pin
37 ROUT2 R data output pin
38 ROUT1 R data output pin
39 ROUT0 R data output pin
40 4FSC0 Clock output pin
41 FSC0 Clock output pin
42 GOUT3 G data output pin
43 GOUT2 G data output pin
44 GOUT1 G data output pin
45 GOUT0 G data output pin
46 BOUT3 B data output pin
47 BOUT2 B data output pin
48 BOUT1 B data output pin
49 BOUT0 B data output pin
50
CE2
Video output control input pin
51
CE3
Sync signal control input pin
52 YS Superimposition output pin
53 EFLG Error status monitor output pin
54 HRESET External horizontal synchronization input pin
55 LINE Line number selection pin
56 VRESET External vertical synchronization input pin
57 INIT Initial input pin
58 RESET Reset input pin
59 N/P NTSC/PAL selection input pin
60
SON
Superimposition control pin
61 XIN2
Crystal oscillator connection pins
62 XOUT2
63 XIN1
Crystal oscillator connection pins
64 XOUT1
I/O Polarity
Function
3ST Negative Horizontal sync signal output
I/O Positive Video signal R3 data output
I/O Positive Video signal R2 data output
I/O Positive Video signal R1 data output
I/O Positive Video signal R0 data output
3ST Positive 4 × FSC clock output
NTSC: 14.31818 MHz
PAL: 17.734476 MHz
Subcarrier clock output NTSC: 3.579545 MHz
3ST Positive
PAL: 4.433619 MHz
I/O Positive Video signal G3 data output
I/O Positive Video signal G2 data output
I/O Positive Video signal G1 data output
I/O Positive Video signal G0 data output
I/O Positive Video signal B3 data output
I/O Positive Video signal B2 data output
I/O Positive Video signal B1 data output
I/O Positive Video signal B0 data output
Signal input setting video output pin to high impedance
In Positive (MORE+ input)
Signal input setting sync signal output pin to high impedance
In Positive (MORE+ input)
Out Positive Superimposition control output
Out Positive Error status monitor signal output
In Negative External horizontal synchronization timing control pin
Line number selection input
In — NTSC : L = 263H, H = 262H
PAL : H = 312H, L = 314H
In Negative External vertical synchronization timing control pin
In Negative System initial signal input
In Negative System reset signal input
NTSC/PAL selection input
In Positive L: NTSC, H: PAL
Superimposition ON/OFF control input
In Positive H: Superimposition ON
In —
PAL crystal oscillator connection pin (4Fsc = 17.734476 MHz)
Out —
In —
NTSC crystal oscillator connection pin (4Fsc = 14.31818 MHz)
Out —
No. 5521-11/22
11 Page | ||
| Páginas | Total 22 Páginas | |
| PDF Descargar | [ Datasheet LC7874E.PDF ] | |
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