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Zarlink |
www.DataSheet4U.com
A Voice Solution
FEATURES
Complete 1FXS chipset for VoIP
access devices
Implements all the key BORSHT
functions
Built-in DC/DC controller
configurable for buck-boost or
flyback operation
Integrated balanced ringing
generator capable of driving
5 REN at 70 VPK or 3 REN at
92 VPK
Low Power Standby with 50 mW
typical On-Hook dissipation
Standard 8 kHz and Wideband
16 kHz sample rates
Single hardware design with
software support for worldwide
markets
VoicePathTM API-II Software
— Significantly reduces
development and testing time
— Enables modular designs based
on the VE8910 and other
members of the VE890 Series for
1FXS, 1FXS+1FXO, and
2FXS+1FXO product variants
— Allows for a seamless migration
between products using a
common software architecture
— Supported by SDK, development
board, and reference designs
Support for GR-909/TIA-1063
metallic loop (line) testing using
VeriVoiceTM Test Suite software
APPLICATIONS
Residential and SOHO VoIP CPE, such as ADSL2+/VDSL2 Integrated Access
Devices (IADs), Analog Telephone Adapters (ATAs), and VoIP Gateways
™
VE890 Series
VE8910 Chipset
1FXS
PACKAGE OPTIONS
48-Pin LQFP
1(6w-iPdein) SOIC
PIN ASSIGNMENTS
LFC
SWIS
SWISG
SWVS
SWCMP
SWOUT
SWOUT
DVDD
I/O1
DGND
I/O2
RST
48 47 46 45 44 43 42 41 40 39 38 37
1 36
2 35
3 34
4 33
5 32
6 Le89116 SLAC
7 LQFP-48
31
30
8 29
9 28
10 27
11 26
12 25
13 14 15 16 17 18 19 20 21 22 23 24
IBO
TFLT
IBT
IBR
RSVD
AGND
RSVD
AVDD
RSVD
CSMODE
I/O3
I/O4
DESCRIPTION
The VE8910 chipset is an integrated, low-cost 1FXS chipset that is optimized for VoIP
access devices. The chipset implements a complete BORSHT functionality by
providing the necessary voice interface functions to power, ring, signal, and connect
one or more telephones. On the digital side, the VE8910 chipset provides standard MPI
and PCM interfaces to leading VoIP processors. The VE8910 features low power
consumption in all modes of operation; In on-hook Low Power Standby, it typically
draws 50 mW, less than half that of its nearest competitor.
The VE8910 chipset is supported by the Zarlink VoicePath™ API-II (VP API-II) software
package, which enables designers to program a single hardware circuit for worldwide
markets. The VP API-II 'C' code is used to abstract the Zarlink devices from application
code while providing functions for controlling, supervising, and testing a set of
subscriber lines. The Zarlink VeriVoice™ Test Suite software package provides metallic
loop testing based on the Telcordia GR-909 and TIA-1063 recommendations.
FUNCTIONAL BLOCK DIAGRAM
TIP 1
VBAT 2
BGND 3
VCC 4
RSN 5
LSN 6
VREF 7
IBI 8
Le89810 SLIC
SOIC-16 (Wide)
16 RING
15 RSVD
14 RSVD
13 AGND
12 RSVD
11 IBR
10 IBT
9 TFLT
Telephone
FXS
Le89810 SLIC
Tip &
Ring
Line
Driver
Level
Shifting
Buffer
Le89116 SLAC
Line Driver
Interface
S w itch in g
Regulator
Controller
Audio
Processing
Analog Ref.
& PLL
Supervision,
Control, &
Test
µProcessor
Interface
(M P I)
PCM Interface
& Time Slot
Assigner
(TSA)
VoIP Processor
VoicePath
API-II
Software
NOTE: On August 3, 2007, Zarlink Semiconductor acquired the products and Document ID# 081575 Date: February 4, 2009
technology of Legerity Holdings.
Distribution: Protected
VE8910
Data Sheet
TABLE OF CONTENTS
www.DataSheet4U.com
1.0 Solution Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.0 VoicePath™ SDK and API-II . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 VoicePath SDK Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.2 VoicePath™ API-II Software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.3 VoicePath Profile Wizard. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.4 MPI Access Layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.5 System Services Layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.0 FXS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.1 FXS Channel Overview and Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.2 Device Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.3 FXS Channel Functional Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.4 FXS Channel VP API-II Operation States . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.5 FXS Supervision Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.6 FXS Line Testing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.7 Analog Reference Circuits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.0 Digital Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.1 Digital Interfaces Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.2 Digital Interfaces Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.3 PCM/MPI Interface and Time Slot Assigner (PCM). . . . . . . . . . . . . . . . . . . . . . . . 22
4.4 Microprocessor Interface (MPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.5 Interrupt Servicing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
4.6 Input / Output Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.0 Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
5.1 Absolute Maximum Ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
5.2 Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
5.3 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.4 Typical FXS Transmission Plots . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
5.5 Switching Characteristics and Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
6.0 Device Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
6.1 Le89116 FXS Line Audio Controller (SLAC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
6.2 Le89810 1FXS SLIC Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
7.0 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
7.1 SLIC and SLAC Application Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
7.2 12 V Inverting Buck-Boost Switching Regulator Circuit Example . . . . . . . . . . . . . 51
7.3 5 V Flyback Fixed Tracking Switching Regulator Circuit Example . . . . . . . . . . . . 53
8.0 Package Outline Drawings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
8.1 LQFP-48 Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
8.2 SOIC-16 (Wide) Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
9.0 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
10.0 Related Collateral . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
10.1 Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
10.2 Development Hardware. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
10.3 Software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
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Zarlink Semiconductor Inc.
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