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Digital Video Clock Source



Integrated Circuit Systems 로고
Integrated Circuit Systems
ICS664-01 데이터시트, 핀배열, 회로
ICS664-01
Digital Video Clock Source
Description
The ICS664-01 provides clock generation and
www.dactaosnhveeetr4sui.oconmfor clock rates commonly needed in HDTV
digital video equipment. The ICS664-01 uses the latest
PLL technology to provide excellent phase noise and
long term jitter performance for superior
synchronization and S/N ratio.
For audio sampling clocks generated from 27 MHz, use
the ICS661.
Please contact ICS if you have a requirement for an
input and output frequency not included in this
document. ICS can rapidly modify this product to meet
special requirements.
Features
Packaged in 16-pin TSSOP
Clock or crystal input provides flexibility
Low phase noise supports enhanced SNR
Lowest jitter in class at 100 ps
Exact (0 ppm) multiplication ratios
Power-down mode lowers power consumption
Improved phase noise over ICS660
Block Diagram
X2
X1/REFIN
SELIN
S3:0 4
VDD (P2)
Crystal
Oscillator
GND (P13)
VDD (P3) VDDO
VDD (P14)
PLL Clock
Synthesis
CLK
GND (P6)
GND (P5)
MDS 664-01 A
1
Revision 050704
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com


ICS664-01 데이터시트, 핀배열, 회로
ICS664-01
Digital Video Clock Source
Pin Assignment
X1/REFIN
www.datasheet4u.coVmDD
VDD
S0
GND
GND
S3
S2
1
2
3
4
5
6
7
8
16 X2
15 N/C
14 VDD
13 GND
12 SELIN
11 VDDO
10 S1
9 CLK
16-pin TSSOP
Pin Descriptions
Output Clock Selection Table
Input
Output
S3 S2 S1 S0 Frequency Frequency
(MHz)
(MHz)
0000
Power down
0001
Pass thru
Input Freq
0010
27
74.25
0 0 1 1 27 74.175824
0100
13.5
74.25
0 1 0 1 13.5 74.175824
0 1 1 0 RESERVED RESERVED
0 1 1 1 RESERVED RESERVED
1000
74.25
54
1 0 0 1 74.175824
54
1 0 1 0 RESERVED RESERVED
1 0 1 1 RESERVED RESERVED
1100
54
74.25
1 1 0 1 54 74.175824
1110
54
13.5
1111
27
13.5
Pin Pin
Number Name
1 X1/REFIN
2 VDD
3 VDD
4 S0
5 GND
6 GND
7 S3
8 S2
9 CLK
10 S1
11 VDDO
12 SEL
13 GND
14 VDD
15 NC
16 X2
Pin
Type
Input
Power
Power
Input
Power
Power
Input
Input
Output
Input
Power
Input
Power
Power
Input
Pin Description
Connect this pin to a crystal or clock input
Power supply for crystal oscillator.
Power supply for PLL.
Output frequency selection. Determines output frequency per table above. On chip pull up.
Ground for output stage.
Ground for PLL.
Output frequency selection. Determines output frequency per table above. On chip pull up.
Output frequency selection. Determines output frequency per table above. On chip pull up.
Clock output.
Output frequency selection. Determines output frequency per table above. On chip pull up.
Power supply for output stage.
Low for clock input, high for crystal. On chip pull up.
Connect to ground.
Power supply.
No connect. Do not connect to anything.
Connect this pin to a crystal. Leave open if using a clock input.
MDS 664-01 A
2
Revision 050704
Integrated Circuit Systems, Inc.525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com




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