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PDF YGV628B Data sheet ( Hoja de datos )
| Número de pieza | YGV628B | |
| Descripción | AVDP7 Advanced Video Display Processor 7 | |
| Fabricantes | YAMAHA CORPORATION | |
| Logotipo |  |
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YGV628B
AVDP7
Advanced Video Display Processor 7
■ Outline
YGV628B (hereafter called AVDP7) is the latest version of YAMAHA AVDP series which has many past
successful records in various visual equipments, vehicle equipment, etc.
Three bit-map planes are equipped, and it can be displayed in piles to an external image; furthermore, AVDP7
has many functions as OSD (On Screen Display), such as α-blending, change of a display priority, etc. In addition,
it has a digital image Input/Output function to allow an external image to be expanded or reduced.
Moreover, AVDP7 is supports to the resolution up to SVGA, and it is possible to apply to the various digital
equipments only by connecting one SDRAM to an external memory as a frame memory.
■ Feature
□ OSD Function
● The OSD images which is composed of plains in case of a digital image input is overlaid.
Simultaneous use of three plains is possible in AVDP7 at its maximum.
● The natural picture display of 65536 colors by R5bit, G6bit, and B5bit. It is the palette color of 256
colors in 16777216 colors.
● Supports 16bit YCrCb422
● 16 gray-levels of α-blending in dot units
● Conversion of display priority is possible
□ Display Resolution
● Creation of the Display Timing of NTSC, PAL, QVGA, Wide QVGA, VGA, Wide VGA, and SVGA is
possible.
● Examples of Correspondence Resolution : 320×240, 400×240, 720×240, 640×480, 800×480, 800×600,
etc..
● Resolution Converting Function : Horizontal direction Æ 1/2 times to 8192 times display
Vertical direction Æ 1/4 times to 8192 times display.
YGV628B CATALOG
CATALOG No.: LSI-4GV628B20
2005.7
1 page  
YGV628B
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z Example of application to digital image equipment (CPU, SDRAM, etc. are omitted)
Analog Image NTSC
Decoder [ITU656]
AVDP7
Image+OSD
[ITU656]
CRT / LCD
Digital Image MPEG
Decoder [ITU656]
Image through
[ITU656]
Aux. Video
z Example of application to digital recording equipment (CPU, SDRAM, etc. are omitted)
Broadcasting Image
[ITU656]
AVDP7
Image + OSD
[ITU656]
CRT / LCD
Recorded Image
[ITU656]
MPEG
Decoder
Recording
System
Image through
[ITU656]
MPEG
Encoder
-5-
5 Page 
YGV628B
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2) Clock
To AVDP7, a clock (dot clock) for a scan timing of monitor display, and for passing a display data, a clock (capture
clock) for capturing a digital image input, and a clock (system clock) which is used for other process are supplied
separately.
Please input a dot clock and a capture clock into GCK1IN pin and GCK2IN pin, and input a system clock into
SYCKIN pin.
Since there is no function of XTAL oscillation, be sure to input the clock which carried out the external oscillation.
● GCK1IN (Input Pin No.172)
● GCK2IN (Input Pin No.146)
- These are input pins of a dot clock and a capture clock.
- Be sure to input the 5MHz to 40MHz clock oscillated externally into these pins.
● SYCKIN (Input Pin No. 173)
- It is a system clock input pin. The reference clock for the built-in PLL is input.
- Be sure to input the 5MHz to 40MHz clock into SYCKIN.
● FILTER (Analog Pin No.176)
- It is the filter connection pin for built-in PLL used for a system clock oscillation.
- Please connect a resistor and a capacitor externally between PLLVSS pin and FILTER pin.
3) CPU Interface
● D15-0 (Input/Output Pin No. 39-42, 44, 45, 47-52, 54-57)
- It is a CPU data bus pin. It connects with an external data bus of CPU.
- Since these pins do not internally have a pull-up resistor, please make the pull-up outside of the device.
● A23-1(Input Pin No. 1-4, 6, 8-18, 21-27)
- It is a CPU address bus pin. It connects with an external address bus of CPU.
- Since these pins do not internally have a pull-up resistor, please make the pull-up outside of the device if
necessary.
● CS_N (Input Pin No.33)
- It is a chip select input pin.
- The chip select signals from CPU to register space or video memory space are input.
- Since this pin does not internally have a pull-up resistor, please make the pull-up outside of the device if
necessary.
- This signal is low active.
● RD_N (Input Pin No.30)
- It is a READ pulse input pin.
- The strobe signal for data read-out from CPU is input.
- Since this pin does not internally have a pull-up resistor, please make the pull-up outside of the device if
necessary.
- This signal is low active.
● WRH_N (Input Pin No.28)
● WRL_N (Input Pin No. 29)
- It is a WRITE pulse input pin. The strobe signal for data writing from CPU is input.
- Since these pins do not internally have a pull-up resistor, please make the pull-up outside of the device if
necessary.
-11-
11 Page | ||
| Páginas | Total 26 Páginas | |
| PDF Descargar | [ Datasheet YGV628B.PDF ] | |
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