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Lovoltech |
PWRLITE LD1014D
High Performance N-Channel POWERJFETTM with PN Diode
Features
Superior gate charge x Rdson product (FOM)
Trench Power JFET with low threshold voltage Vth.
Device fully “ON” with Vgs = 0.7V
Optimum for “Low Side” Buck Converters
Excellent for high frequency dc/dc converters
www.DataSheet4U.cOopmtimized for Secondary Rectification in isolated DC-DC
Low Rg and low Cds for high speed switching
Applications
DC-DC Converters
Synchronous Rectifiers
PC Motherboard Converters
Step-down power supplies
Brick Modules
VRM Modules
Description
The Power JFET transistor from Lovoltech is a device that
presents a Low Rdson allowing for improved efficiencies in DC-
DC switching applications. The device is designed with a low
threshold such that drivers can operate at 5V, which reduces the
driver power dissipation and increases the overall efficiency.
Lower threshold produces faster turn-on/turn-off, which
minimizes the required dead time. A PN Diode is added for
applications where a freewheeling diode is required.
This product has tin plated leads.
DPAK Lead-free Pin Assignments
D
GS
Pin Definitions
Pin Number Pin Name Pin Function Description
1 Gate Gate. Transistor Gate
2 Drain Drain. Transistor Drain
3 Source Source. Transistor Source
Absolute Maximum Ratings
Parameter
Drain-Source Voltage
Gate-Source Voltage
Gate-Drain Voltage
Continuous Drain Current
Pulsed Drain Current
Single Pulse Drain-to-Source Avalanche Energy at 25°C
(VDD= 6VDC, IL=60APK, L=0.3mH, RG=100 Ω)
Junction Temperature
Storage Temperature
Lead Soldering Temperature, 10 seconds
Power Dissipation (Derated at 25°C)
D
G
S
N – Channel Power JFET
with PN Diode
VDS (V)
24V
Product Summary
Rdson (Ω)
0.0065
Symbol
VDS
VGS
VGD
ID
ID
EAS
TJ
TSTG
T
PD
Ratings
24
-12
-28
501
100
200
-55 to 150°C
-65 to 150°C
260°C
69
ID (A)
501
Units
V
V
V
A
A
mJ
°C
°C
°C
W
LD1014D Rev 1.05 03-05
Thermal Resistance
Symbol
Parameter
RΘJA
RΘJC
Thermal Resistance Junction-to-Ambient
Thermal Resistance Junction-to-Case
DPAK
Ratings
90
1.8
Electrical Specifications
(TA = +25°C, unless otherwise noted.)
The φ denotes a specification which apply over the full operating temperature range.
Symbol
Parameter
Conditions
Min.
Static
www.DataSheeBt4VUD.cSoXm
BVGDO
Breakdown Voltage
Drain to Source
Breakdown Voltage
Gate to Drain
ID = 0.5 mA
VGS= -4 V
IG = -50µA
24
BVGSO
Breakdown Voltage
Gate to Source
IG = -50µA
RDS(ON)
VGS(TH)
Drain to Source On
Resistance2
Gate Threshold Voltage
IG = 40 mA, ID=10A
IG = 10 mA, ID=10A
IG = 5 mA, ID=10A
VDS=0.1 V, ID=250µA
TCVGSTH Temperature Coefficient of
Gate Threshold Voltage
VDS=0.1 V, ID=250µA
Dynamic
QGsync
QG
QGD
QGS
QSW
RG
Total Gate Charge Sync JFET
Total Gate Charge
Gate to Drain Charge
Gate to Source Charge
Switching Charge
Gate Resistance
∆VDrive =5V,VDS=0.1V (Fig. 2)
∆VDrive =5V, ID=10A,VDS=15V
VDS=13.5V to VDS=1.5V
VGS =-4.5V to VDS=13.5V
VGS =-2V to VDS=1.5V
TD(ON)
TR
TD(OFF)
TF
CISS
COSS
CGS
CGD
CDS
Turn-on Delay Time
Rise Time
Turn-off Delay
Fall Time
Input Capacitance
Output Capacitance
Gate-Source Capacitance
Gate-Drain Capacitance
Drain-Source Capacitance
VDD=15V, ID=10A
VDrive = 5 V
Resistive Load
VDS=10V, VGS= -5 V, 1MHz.
(see Fig. 4)
Typ.
28
-32
-14
4.6
4.8
4.9
-1
-2.6
9.8
12.4
8.1
4.3
9.1
0.7
5.5
12.6
10.3
6.6
1147
467
784
363
104
PN Diode
IR Reverse Leakage
VR=20V, Vgs = -4V
VF Forward Voltage
IF = 1 A
VF Forward Voltage
IF = 10 A
VF Forward Voltage
IF = 20 A
Qrr
Reverse Recovery Charge
Is = 10 A di/dt = 100A/us,
Trr Reverse Recovery Time Is = 10 A di/dt = 100A/us,
Notes:
1. Current is limited by bondwire; with an Rthjc = 1.8 oC/W the chip is able to carry 80A.
2. Pulse width <= 500µs, duty cycle < = 2%
812
932
1010
7
13.3
Units
°C/W
°C/W
Max. Units
V
-28 V
-12 V
6.5 mΩ
7.0 mΩ
V
mV/oC
nC
nC
nC
nC
nC
Ω
ns
pF
0.3 mA
mV
mV
mV
nC
ns
2
LD1014D
Lovoltech, Inc. - 3970 Freedom Circle - Santa Clara, CA 95054 -USA
Tel. 1 408 654 1980 Fax 1 408 654 1988 www.lovoltech.com
Product Specification
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