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PDF M74C923 Data sheet ( Hoja de datos )
| Número de pieza | M74C923 | |
| Descripción | MM74C923 | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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October 1987
Revised January 1999
www.DataSheet4U.com
MM74C922 • MM74C923
16-Key Encoder • 20-Key Encoder
General Description
The MM74C922 and MM74C923 CMOS key encoders pro-
vide all the necessary logic to fully encode an array of
SPST switches. The keyboard scan can be implemented
by either an external clock or external capacitor. These
encoders also have on-chip pull-up devices which permit
switches with up to 50 kΩ on resistance to be used. No
diodes in the switch array are needed to eliminate ghost
switches. The internal debounce circuit needs only a single
external capacitor and can be defeated by omitting the
capacitor. A Data Available output goes to a high level
when a valid keyboard entry has been made. The Data
Available output returns to a low level when the entered
key is released, even if another key is depressed. The Data
Available will return high to indicate acceptance of the new
key after a normal debounce period; this two-key roll-over
is provided between any two switches.
An internal register remembers the last key pressed even
after the key is released. The 3-STATE outputs provide for
easy expansion and bus operation and are LPTTL compat-
ible.
Features
s 50 kΩ maximum switch on resistance
s On or off chip clock
s On-chip row pull-up devices
s 2 key roll-over
s Keybounce elimination with single capacitor
s Last key register at outputs
s 3-STATE output LPTTL compatible
s Wide supply range: 3V to 15V
s Low power consumption
Ordering Code:
Order Number Package Number
Package Description
MM74C922N
N18A
18-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
MM74C922WM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide
MM74C923WM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide
MM74C923N
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Connection Diagrams
Pin Assignment for DIP
Pin Assignment for SOIC
Top View
MM94C922
© 1999 Fairchild Semiconductor Corporation DS006037.prf
Top View
MM74C922
www.fairchildsemi.com
1 page  
DC Electrical Characteristics (Continued)
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Symbol
Parameter
Conditions
OUTPUT DRIVE (See Family Characteristics Data Sheet) (Short Circuit Current)
ISOURCE
ISOURCE
ISINK
ISINK
Output Source Current
(P-Channel)
Output Source Current
(P-Channel)
Output Sink Current
(N-Channel)
Output Sink Current
(N-Channel)
VCC = 5V, VOUT = 0V,
TA = 25°C
VCC = 10V, VOUT = 0V,
TA = 25°C
VCC = 5V, VOUT = VCC,
TA = 25°C
VCC = 10V, VOUT = VCC,
TA = 25°C
AC Electrical Characteristics (Note 3)
TA = 25°C, CL = 50 pF, unless otherwise noted
Symbol
Parameter
Conditions
tpd0, tpd1
Propagation Delay Time to
Logical “0” or Logical “1”
from D.A.
t0H, t1H
Propagation Delay Time from
Logical “0” or Logical “1”
into High Impedance State
tH0, tH1
Propagation Delay Time from
High Impedance State to a
Logical “0” or Logical “1”
CL = 50 pF (Figure 1)
VCC = 5V
VCC = 10V
VCC = 15V
RL = 10k, CL = 10 pF (Figure 2)
VCC = 5V, RL = 10k
VCC = 10V, C L = 10 pF
VCC = 15V
RL = 10k, CL = 50 pF (Figure 2)
VCC = 5V, RL = 10k
VCC = 10V, CL = 50 pF
VCC = 15V
CIN Input Capacitance
Any Input (Note 4)
COUT
3-STATE Output Capacitance
Any Output (Note 4)
Note 3: AC Parameters are guaranteed by DC correlated testing.
Note 4: Capacitance is guaranteed by periodic testing.
Min
−1.75
−8
1.75
8
Typ
−3.3
−15
3.6
16
Max
Units
mA
mA
mA
mA
Min
Typ
Max
Units
60 150 ns
35 80 ns
25 60 ns
80 200 ns
65 150 ns
50 110 ns
100 250
55 125
40 90
5 7.5
10
ns
ns
ns
pF
pF
5 www.fairchildsemi.com
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