파트넘버.co.kr iT4134D 데이터시트 PDF


iT4134D 반도체 회로 부품 판매점

2 to 4 GHz clock multiplier



Iterra 로고
Iterra
iT4134D 데이터시트, 핀배열, 회로
iT4134D
X2, 4-to-7 GHz Clock Multiplier
(Advanced Information)
Description
www.DataSheet4U.com
The iT4134D is a high-speed X2 clock multiplier fabricated using 1-μm HBT GaAs technology
and employs an ECL topology to guarantee high-speed operation. It is an excellent choice for
digital clock multiplication, instrumentation, and edge detection. Digital clock multiplication is
implemented via XOR operation between the input clock and an internal delayed replica. Several
embedded electrically-controlled phase delays are also employed. Suitable regulation of the
phase delay voltage controls allows duty cycle control on the clock outputs. Suitable power
supply internal distribution provides the ability to disable the echo input which reduces power
consumption. The iT4134D can also be stimulated via NRZ data to perform edge detection. A
dedicated temperature monitoring pin is also provided.
Features
™ Clock input range: 4 to 7 GHz
™ 900 mVpp typical single-ended output
™ Input sensitivity: Single-ended input >200 mV
™ Jitter RMS <1 ps
™ 50-ohm matched inputs and outputs (DC)
™ Compatible SCFL I/O levels
™ Differential or single-ended I/O
™ Duty cycle control
™ Echo inputs available
™ Power consumption: 1.25 W
Device Diagram
Absolute
Maximum
Ratings
Stresses above those listed
under Absolute Maximum
Ratings may cause
permanent damage to the
device. This is a stress
rating only; functional
operation of the device at
these or any other
conditions above those
indicated in the operational
section of this document is
not implied. Exposure to
absolute maximum rating
conditions for extended
periods may affect device
reliability.
www.iterrac.com
Symbol
Parameters/conditions
Min.
Max. Units
VEE Power supply voltage
VPc
Phase delay voltage control (coarse duty cycle
adjustment)
-5.5 0 V
-3.5 0 V
VPf
Phase delay voltage control (fine duty cycle adjustment)
-3.5
0
V
VIH Data/clock input voltage level, high level
-1.2 1.2
V
VIL Data/clock input voltage level, low level
-1.2 1.2
V
TA Operating temperature range
TSTG
Storage temperature
-15 125 °C
-65 150 °C
This is an Advanced data sheet. See “Product Status Definitions”
on Web site or catalog for product development status.
October 10, 2005 Doc. 4056 Rev 0
1
iTerra Communications
2400 Geng Road, Ste. 100, Palo Alto, CA 94303
Phone (650) 424-1937, Fax (650) 424-1938


iT4134D 데이터시트, 핀배열, 회로
iT4134D
X2, 4-to-7 GHz Clock Multiplier
(Advanced Information)
Recommended
Operating
Conditions
Symbol
Ta
Parameters/Conditions
Operating temperature range
www.DataSheet4U.com
Vee Power supply voltage
Vih
Data/clock input voltage level, high level (single
ended)
Vil
Data/clock input voltage level, low level (single
ended)
Vindc
DC input voltage (with DC-coupled input)
Min. Typ. Max
0 85
-5
0.25
-0.25
0
Units
°C
V
V
V
V
Electrical Symbol
Characteristics Vee
Vih
1. Electrical
characteristics at
ambient
temperature.
2. In case of single-
ended inputs the
unused pin has to
be tied to VINDC. In
case of single-
ended output the
unused one has to
be terminated via
50 ohms to ground.
3. The pin VPmon
can be left open or
sensed with high-
impedance load for
temperature
monitoring.
4. In case of echo
inputs, an extra 65-
mA (325-mW) at -5
V must be taken into
account
Vil
Vindc
VPmon
VPc
VPf
Voh
Vol
Tdc
RLin
RLout
Fclk
Jpp
Jrms
SHS
Ic
Pd
Parameters
Power supply voltage
Data/clock input voltage level, high level (single
ended)
Data/clock input voltage level, low level (single
ended)
DC input voltage (with DC-coupled input) (2)
Internally generated reference voltage for 0 ps
delay offset of the embedded phase delays (coarse
and fine). (3)
Phase delay voltage control (coarse duty cycle
adjustment)
Phase delay voltage control (fine duty cycle
adjustment)
Data/clock output voltage level, high level (single
ended)
Data/clock output voltage level, low level (single
ended)
Duty cycle control
Input return loss (up to 25 GHz)
Output return loss (up to 25 GHz)
Input clock frequency
Peak to peak jitter
RMS jitter
Sub-harmonic suppression
Power supply current (4)
Power dissipation (4)
Min
-5.25
Typ Max
-5.0 -4.75
Units
V
-0.5 0.25 0.5
V
-1
-0.75
-0.25
0
0
0.25
V
V
-2.8
VPmon-
0.4
VPmon-
0.4
-0.1
-1.0
40
3.0
4
0.7
15
235
1.1
-2.6 -2.4
VPmo
n+0.4
VPmo
n+0.4
00
-0.9 0.8
50
15
6
5
0.9
20
250
1.25
60
7.0
6
1
25
280
1.5
V
V
V
V
V
%
dB
dB
GHz
ps
ps
mA
mA
W
www.iterrac.com
This is an Advanced data sheet. See “Product Status Definitions”
on Web site or catalog for product development status.
October 10, 2005 Doc. 4056 Rev 0
2
iTerra Communications
2400 Geng Road, Ste. 100, Palo Alto, CA 94303
Phone (650) 424-1937, Fax (650) 424-1938




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iT4134D

2 to 4 GHz clock multiplier - Iterra