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PDF ZEN2002AP Data sheet ( Hoja de datos )

Número de pieza ZEN2002AP
Descripción High Speed 24bit Up/down Counter
Fabricantes Zenic 
Logotipo Zenic Logotipo



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No Preview Available ! ZEN2002AP Hoja de datos, Descripción, Manual

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ZEN2002AP
P ROGRAMMABLE UNIVE RSAL COUNTE R
Description
ZENIC INC. ZEN2002AP is a 24 bit pr ogr a m m a ble u n iver sa l cou n t er LSI .
TH E ZEN2002AP cou n t s ph a se-sh ift ed sign a ls a n d u p/down pu lse sign a ls, gen er a t ed fr om r ot a r y en coder s or
lin ea r sca les.
Sin ce t h e cou n t er r espon se speed is a s h igh a s 20MH z(MAX),t h e ZEN2002AP is u sed in a va r iet y of h igh speed
ser vices in clu din g digit a l ser vo con t r ol a n d pr ecision m ea su r em en t .
TH E ZEN2002AP is pr ovided wit h a fu n ct ion wh ich m on it or s t h e in pu t sign a ls a n d det ect s a n y a bn or m a l in pu t
a ccom pa n ied wit h n oise or ot h er dist u r ba n ces, so t h a t t h e r elia bilit y of cou n t ed va lu es a r e secu r ed.
1, Features
24 bit bin a r y u p/down cou n t er .
Cou n t er r espon se speed:
20MH z.(MAX.) ( CLK f0 = 20MH z a t 50% du t y)
In pu t fr equ en cy of cou n t pu lse.
P h a se-sh ift ed sign a l in pu t :
A/B ph a se in pu t DC ~ 5MH z.
(less t h a n f0 ~ 1/4)
U p/down pu lse sign a l in pu t :
U p/down in pu t DC ~ 10MH z
(less t h a n f0 ~ 1/2)
CLK fr equ en cy DC ~ 20MH z.
(MAX.: du t y r a t io 50%)
Dir ect ion r ecogn it ion for u p/down cou n t in g.
Abn or m a l in pu t det ect ion cir cu it .
P r eloa d r egist er for t h e u p/down cou n t er .
La t ch r egist er for t h e u p/down cou n t er .
Refer en ce va lu e - cou n t va lu e coin ciden ce
det ect ion fu n ct ion .
Mom en t a r y ou t pu t : TTL
In t er r u pt ou t pu t (la t ch ed) : open collect or
On -ch ip st a t u s r egist er .
Cou n t er oper a t ion m ode.
E dge eva lu a t ion select ion : sin gle/dou ble/qu a d
(on ly for ph a se-sh ift ed sign a l in pu t )
Cou n t dir ect ion select ion .
Cou n t er clea r con t r ol:syn ch r on ou s/
a syn ch r on ou s clea r .
F ixed/va r ia ble edge clea r .
8 bit data bus.
Low power CMOS t ech n ology.
TTL com pa t ible.
Sin gle 5V power su pply.
28 pin DIP.
2, Typical Applications
NC m a ch in e t ools
P r ecision posit ion er s
Robot a r m con t r oller s
Speed con t r oller s for r ot a t in g m a ch in es
E lect r on ic ga u ges
F r equ en cy cou n t er s
Pin configuration
(Top view)
VSS
CLK
RESET
CE
C/D
RD
WR
LD
LT
D0
D1
D2
D3
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VDD
INT
EQ
UD/AB
DIR
VSS
A/UP
B/DN
Z/CLR
D7
D6
D5
D4
VDD
ZENIC Inc.
-1-

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ZEN2002AP pdf
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6, Basic operation
The read/write operation is selected according to CE, C/D, RD, and WR.
ZEN2002AP
CE C/D RD WR Operation
H - - - Disable
L L L H The data reading
L L H L The data writing
L H L H Status reading
L H H L Command writing
1) Selection of count pulse input
UD/AB
H
L
Input pulse signal
Up/down pulse
Phase-shifted pulse
A/UP
Up pulse
Phase-A pulse
B/DN
Down pulse
Phase-B pulse
2) Access pointer
The internal register is selected by setting the access pointer of the command register. Once setting the pointer,
it is incremented automatically after reading or writing 1 byte data. ( automatical increment function )
3) Abnormal input detection
The function is to check whether it is normal state transition () when the phase-shifted pulse is input.
When the abnormal state transition happens , D7 of the status register becomes "H".
AB AB
01 11
: noamal transition
: abnormal transition
00 10 Example of causing abnormal
a. When it is not possible to sample signal accurately
because the pulse input frequency exceeded 1/4 of the system clock frequency.
b. When you pick up noise.
4) Selection of count edge ( C = count , nc = no count )
Up/down pulse input
UP
DN
Single C C C C nc
Phase-shifted pulse input
( CW (phase-A preceding))
A
( CCW (phase-B preceding))
A
BB
Single
Double
Quad
C nc nc nc
C nc C nc
CCCC
Single
Double
Quad
nc nc nc C
nc C nc C
CCCC
ZENIC Inc.
-5-

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ZEN2002AP arduino
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Read cycle
C/D,CE
RD
D7~D0
t tAR RR
tRD
tRA
tDF
Clock waveform
CLK
φr
Reset waveform
RESET
LD
(LT)
φf
tRST
tLDW
(tLTW)
φ
φcy
φ
ZEN2002AP
C/D:"High" Ρ Status reading
"Low" Ρ Data reading
- 11 -
ZENIC Inc.

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