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PDF ISL23511 Data sheet ( Hoja de datos )

Número de pieza ISL23511
Descripción Push Button Controlled Potentiometer
Fabricantes Intersil Corporation 
Logotipo Intersil Corporation Logotipo



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ISL23511
®
Single Push Button Controlled Potentiometer (XDCP™)
Data Sheet
December 3, 2007
FN6588.0
Low Noise, Low Power, 32 Taps, Push
Button Controlled Potentiometer
The Intersil ISL23511 is a three-terminal digitally-controlled
potentiometer (XDCP) implemented by a resistor array
composed of 31 resistive elements and a wiper switching
network. The ISL23511 features a push button control, a
shutdown mode, as well as an industry-leading µTQFN
package.
The push button control has individual PU and PD inputs for
adjusting the wiper. To eliminate redundancy the wiper
position will automatically increment or decrement if one of
these inputs is held longer than one second.
Forcing both PU and PD low for more than two seconds
activates shutdown mode. Shutdown mode disconnects the
top of the resistor chain and moves the wiper to the lowest
position, minimizing power consumption.
The three terminals accessing the resistor chain naturally
configure the ISL23511 as a voltage divider. A rheostat is
easily formed by floating an end terminal or connecting it to
the wiper.
VCC (SUPPLY VOLTAGE)
PU
CONTROL
PD BLOCK
RH
RW
RL
VSS (GROUND)
NC
O
PU 1
9 NC
PD 2 uTFQFN 8 VCC
RH 3 (Top View) 7 NC
VSS 4
6 RL
RW
O
PU 1
8 VCC
PD 2 SOIC 7 NC
RH 3 (Top View) 6 RL
VSS
4
5 RW
Features
• Solid-state volatile potentiometer
• Push button controlled
• Single or Auto increment/decrement
- Fast Mode after 1s button press
• Shutdown Mode
• 32 wiper tap points
- Zero scale wiper position on power-up
• Low power CMOS
- VCC = 2.7V to 5.5V
- Terminal voltage, 0 to VCC
- Standby current, 3µA max
• RTOTAL value = 10kΩ, 50kΩ
• Packages
- 8 Ld SOIC and 10 Ld µTQFN (2.1x1.6mm)
• Pb-free (RoHS compliant)
Applications
• Volume Control
• LED/LCD Brightness Control
• Contrast Control
• Programming Bias Voltages
• Ladder Networks
Ordering Information
PART
NUMBER
PART
MARKING
RTOTAL
(kΩ)
TEMP.
RANGE(°C)
PACKAGE
(Pb-Free)
PKG.
DWG. #
ISL23511WFB8Z* (Note 1)
23511 WFBZ
10
-40 to +125
8 Ld SOIC
M8.15
ISL23511UFB8Z* (Note 1)
23511 UFBZ
50
-40 to +125
8 Ld SOIC
M8.15
ISL23511WFRU10Z* (Note 2)
GA
10
-40 to +125
10 Ld µTQFN
L10.2.1x1.6A
ISL23511UFRU10Z* (Note 2)
FZ
50
-40 to +125
10 Ld µTQFN
L10.2.1x1.6A
*Add “-TK” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
NOTES:
1. These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100%
matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering
operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and NiPdAu
plate - e4 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2007. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

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ISL23511 pdf
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Slow Mode Timing
tDB
PU
ISL23511
tGAP
MI*
VW
* MI in the AC timing diagram refers to the minimum incremental change in the wiper voltage.
Fast Mode Timing
PU
tDB
tS FAST
tS SLOW
VW MI*
1s
* MI in the AC timing diagram refers to the minimum incremental change in the wiper voltage.
Shutdown Mode Timing
tDB
PU
2s
SHUTDOWN MODE
PD
VW
5 FN6588.0
December 3, 2007

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ISL23511 arduino
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ISL23511
Small Outline Plastic Packages (SOIC)
N
INDEX
AREA
E
-B-
H
0.25(0.010) M B M
123
-A-
D
SEATING PLANE
A
L
h x 45°
-C-
e A1
B
0.25(0.010) M C A M B S
α
0.10(0.004)
C
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Inter-
lead flash and protrusions shall not exceed 0.25mm (0.010 inch) per
side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
M8.15 (JEDEC MS-012-AA ISSUE C)
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
INCHES
MILLIMETERS
SYMBOL MIN MAX MIN MAX NOTES
A
0.0532 0.0688 1.35
1.75
-
A1
0.0040 0.0098 0.10
0.25
-
B
0.013 0.020 0.33
0.51
9
C
0.0075 0.0098 0.19
0.25
-
D
0.1890 0.1968 4.80
5.00
3
E
0.1497 0.1574 3.80
4.00
4
e 0.050 BSC
1.27 BSC
-
H
0.2284 0.2440 5.80
6.20
-
h
0.0099 0.0196 0.25
0.50
5
L
0.016 0.050 0.40
1.27
6
N8
87
α 0° 8° 0° 8° -
Rev. 1 6/05
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
11 FN6588.0
December 3, 2007

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