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PDF WH1602B-Y-JCS Data sheet ( Hoja de datos )
| Número de pieza | WH1602B-Y-JCS | |
| Descripción | Module | |
| Fabricantes | DB Lectro | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de WH1602B-Y-JCS (archivo pdf) en la parte inferior de esta página. Total 17 Páginas | ||
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Contents
1.Module Classification Information
2.Precautions in use of LCD Modules
3.General Specification
4.Absolute Maximum Ratings
5.Electrical Characteristics
6.Optical Characteristics
7.Interface Pin Function
8.Contour Drawing & Block Diagram
9.Function Description
10.Character Generator ROM Pattern
11.Instruction Table
12.Timing Characteristics
13.Initializing of LCM
14.Quality Assurance
15.Reliability
第 3 頁，共 19 頁
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※Brightness Control
VBT Brightness(nits) Power consumption(measured with random texts)
2.5V 20(typical)
50mW
3.0V 45(typical)
63mW
Note:1.When random texts pattern is running,averagely,at any instance,about 1/4 of pixels will be
on.
2.If VBT is not operated within 2V and 3V,non-uniformity display may occur.
3.You have to use the saving mode by VBT 2.5V in order to make long life.
8.Contour Drawing &Block Diagram
第 7 頁，共 19 頁
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11.Instruction Table
Instruction
Instruction Code
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Description
Execution time
(fosc=270Khz)
Clear Display 0
Return Home 0
Entry Mode
Set
0
Display
ON/OFF
Control
0
Cursor or
Display Shift
0
Function Set 0
Set CGRAM
Address
Set DDRAM
Address
0
0
Read Busy
Flag and
Address
0
Write Data to
RAM
Read Data
from RAM
1
1
0 0 0 0 0 0 0 0 1 Write “00H” to DDRAM and set
DDRAM address to “00H” from AC
Set DDRAM address to “00H” from AC
0
0
0
0
0
0
0
1
－
and return cursor to its original position
if shifted. The contents of DDRAM are
not changed.
Assign cursor moving direction and
0
0
0
0
0
0
1
I/D
SH
enable the shift of entire display.
I/D=1:Increment；0: Decrement
SH=1:Display shift on
Set display (D), cursor (C), and blinking
of cursor (B) on/off control bit.
0 0 0 0 0 1 D C B D=1:Display on
C=1:Cursor display on
B=1:Cursor blink on
Set cursor moving and display shift
control bit, and the direction, without
0 0 0 0 1 S/C R/L － － changing of DDRAM data.
S/C=1:Shift display；0:Move cursor
R/L=1:Shift right；0:Shift leftf
Set interface data length (DL)
DL=1:8-bit；0:4-bit
0
0
0
1 DL N
F
Set numbers of display lines(N)
－ － N=1:Dual line；0:Single line
Set display font type (F)
F=1:5x10 dots；0:5x8dots
0 0 1 AC5 AC4 AC3 AC2 AC1 AC0 Set CGRAM address in address counter.
0 1 AC6 AC5 AC4 AC3 AC2 AC1 AC0 Set DDRAM address in address counter.
Whether during internal operation or not
can be known by reading BF. The
1 BF AC6 AC5 AC4 AC3 AC2 AC1 AC0 contents of address counter can also be
read.
BF=1:Internal operation
BF=0:Ready for instruction
0 D7 D6 D5 D4 D3 D2 D1 D0 Write data into internal RAM
(DDRAM/CGRAM).
1 D7 D6 D5 D4 D3 D2 D1 D0 Read data from internal RAM
(DDRAM/CGRAM).
1.52ms
1.52ms
37μ s
37μ s
37μ s
37μ s
37μ s
37μ s
0μ s
37μ s
37μ s
＊ ”－”：don’t care
第 13 頁，共 19 頁
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| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet WH1602B-Y-JCS.PDF ] | |
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