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Freescale Semiconductor |
Freescale Semiconductor
Technical Data
Document Number: MC33399
Rev. 10.0, 4/2013
Local Interconnect Network
(LIN) Physical Interface
33399
Local interconnect network (LIN) is a serial communication
protocol designed to support automotive networks in conjunction with
controller area network (CAN). As the lowest level of a hierarchical
network, LIN enables cost-effective communication with sensors and
actuators when all the features of CAN are not required. This device
is powered by SMARTMOS technology.
The 33399 is a physical layer component dedicated to automotive
sub-bus applications. It offers communication speed from 1.0 kbps to
20 kbps, and up to 60 kbps for programming mode. It has two
operating modes: Normal and Sleep.
The 33399 supports LIN protocol specification 1.3.
Features
• Nominal operation from VSUP 7.0 to 18 V DC, functional up to
27 V DC battery voltage and capable of handling 40 V during load
dump
• Active bus waveshaping to minimize radiated emission
• ±5.0 kV ESD on LIN Bus Pin, ±4.0 kV ESD on other pins
• 30 k internal pull-up resistor
• Ground shift operation and ground disconnection Fail-safe at
module level
• An unpowered node does not disturb the network
• 20 µA in Sleep mode
• Wake-up capability from LIN Bus, MCU command and dedicated
high voltage wake-up input (interface to external switch)
• Interface to MCU with CMOS compatible I/O pins
• Control of external voltage regulator
LIN PHYSICAL INTERFACE
EF SUFFIX (PB-FREE)
98ASB42564B
8 PIN SOICN
ORDERING INFORMATION
Device
(Add R2 Suffix for
Tape and Reel)
Temperature
Range (TA)
Package
MC33399PEF
-40 to 125 °C
8 SOICN
VPWR
Regulator
12 V
5.0 V
MCU
33399
VSUP WAKE
INH
GND
EN
TXD
RXD LIN
Figure 1. 33399 Simplified Application Diagram
Freescale Semiconductor, Inc. reserves the right to change the detail specifications,
as may be required, to permit improvements in the design of its products.
© Freescale Semiconductor, Inc., 2006-2013. All rights reserved.
LIN Bus
INTERNAL BLOCK DIAGRAM
INTERNAL BLOCK DIAGRAM
WAKE
VSUP
INF
EN
RXD
TXD
Wake-up
VREG
Control
Logic
Protection
VREF
Bias
Receiver
Driver
30 k
LIN
GND
Figure 2. 33399 Simplified Internal Block Diagram
33399
2
Analog Integrated Circuit Device Data
Freescale Semiconductor
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