파트넘버.co.kr P2040A 데이터시트 PDF


P2040A 반도체 회로 부품 판매점

LCD Panel EMI Reduction IC



Alliance Semiconductor 로고
Alliance Semiconductor
P2040A 데이터시트, 핀배열, 회로
October 2005
rev 1.2
LCD Panel EMI Reduction IC
P2040A
Features
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www.DataSheet4U.com
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FCC approved method of EMI attenuation.
Provides up to 20dB of EMI suppression.
Generates a low EMI spread spectrum clock of the
input frequency.
Input frequency range: 30MHz to 100MHz.
Optimized for VGA, SVGA, and higher resolution
XGA LCD Panels.
Internal loop filter minimizes external components
and board space.
Six selectable high spread ranges up to ± 2%.
Two selectable modulation rates.
SSON# control pin for spread spectrum enable and
disable options.
Low cycle-to-cycle jitter.
Wide operating range.
Low power CMOS design.
Supports most mobile graphic accelerator
specifications.
Products available for automotive temperature
range. (Refer Spread Spectrum Range Selection
Tables)
Available in 8-pin SOIC and TSSOP Packages.
Product Description
The P2040A is a versatile spread spectrum frequency
modulator designed specifically for digital flat panel
applications. The P2040A reduces electromagnetic
interference (EMI) at the clock source, allowing system
wide reduction of EMI of down stream clock and data
dependent signals. The P2040A allows significant system
cost savings by reducing the number of circuit board
layers ferrite beads, shielding and other passive
components that are traditionally required to pass EMI
regulations.
The P2040A uses the most efficient and optimized
modulation profile approved by the FCC and is
implemented in a proprietary all digital method.
The P2040A modulates the output of a single PLL in
order to “spread” the bandwidth of a synthesized clock,
and more importantly, decreases the peak amplitudes of
its harmonics. This results in significantly lower system
EMI compared to the typical narrow band signal produced
by oscillators and most frequency generators. Lowering
EMI by increasing a signal’s bandwidth is called ‘spread
spectrum clock generation’.
Applications
The P2040A is targeted towards digital flat panel
applications for notebook PCs, palm-size PCs, office
automation equipments and LCD monitors.
Block Diagram
SR0 SR1 MRA SSON#
VDD
CLKIN
Frequency
Divider
Feedback
Divider
Modulation
Phase
Detector
Loop
Filter
PLL
VCO
Output
Divider
ModOUT
VSS
Alliance Semiconductor
2575 Augustine Drive Santa Clara, CA Tel: 408.855.4900 Fax: 408.855.4999 www.alsc.com
Notice: The information in this document is subject to change without notice.


P2040A 데이터시트, 핀배열, 회로
October 2005
rev 1.2
Pin Configuration
CLKIN 1
MRA 2
SR1 3
VSS 4
P2040A
8 VDD
7 SR0
6 ModOUT
5 SSON#
P2040A
Pin Description
Pin#
1
2
3
4
5
6www.DataSheet4U.com
7
8
Pin
Name
CLKIN
MRA
SR1
VSS
SSON#
ModOUT
SR0
VDD
Type
Description
I External reference frequency input. Connect to externally generated reference signal.
I Digital logic input used to select modulation rate. This pin has an internal pull-up resistor.
I Digital logic input used to select Spreading Range. This pin has an internal pull-up resistor.
P Ground to entire chip. Connect to system ground.
I
Digital logic input used to enable Spread Spectrum function (Active LOW). Spread Spectrum
function enabled when LOW, disabled when HIGH. This pin has an internal pull-low resistor.
O Spread spectrum clock output.
I Digital logic input used to select Spreading Range. This pin has an internal pull-up resistor.
P Power supply for the entire chip (3.3V)
Modulation Selection (Commercial)
MRA
0
0
0
0
1
1
1
1
SR1
0
0
1
1
0
0
1
1
SR0
0
1
0
1
0
1
0
1
Spreading Range
± 1.125
± 1.75
± 0.75
± 1.25
± 1.25
± 2.00
Reserved
Reserved
Modulation Rate (KHz)
(FIN /40) * 34.72KHz
(FIN /40) * 34.72KHz
(FIN /40) * 34.72KHz
(FIN /40) * 34.72KHz
(FIN /40) * 20.83KHz
(FIN /40) * 20.83KHz
Reserved
Reserved
LCD Panel EMI Reduction IC
Notice: The information in this document is subject to change without notice.
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