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PDF AD8152 Data sheet ( Hoja de datos )
| Número de pieza | AD8152 | |
| Descripción | Digital Crosspoint Switch | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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a
34 ؋ 34, 3.2 Gbps
Asynchronous Digital Crosspoint Switch
AD8152
FEATURES
Low Cost
Low Power
2.0 W @ 2.5 V (Outputs Enabled)
<100 mW @ 2.5 V (Outputs Disabled)
34 ؋ 34, Fully Differential, Nonblocking Array
3.2 Gbps per Port NRZ Data Rate
Wide Power Supply Range: 2.5 V to 3.3 V
LVTTL or LVCMOS Level Control Inputs:
@ 2.5 V to 3.3 V
Low Jitter: 45 ps
Drives a Backplane Directly
Programmable Output Swing
100 mV to 1.6 V Differential
50 ⍀ On-Chip I/O Termination
User Controlled Voltage at the Load
Minimizes Power Dissipation
Dual Rank Latches
Available in 256-Ball Grid Array
APPLICATIONS
Fiber Optic Network Switching
High Speed Serial Backplane Routing to OC-48 with FEC
Gigabit Ethernet
Digital Video (HDTV)
Data Storage Networks
INP
VTTI
INN
FUNCTIONAL BLOCK DIAGRAM
VCC
34 34
34 ؋ 34
OUTPUT
DIFFERENTIAL
LEVEL
34
SWITCH MATRIX
DACs
34
OUTP
VTTO
OUTN
D[5:0]
RESET
CS
A[6:0]
RE
WE
UPDATE
MATRIX
CONNECTION
LATCHES
CONNECTION
DECODE
OUTPUT
LEVEL
LATCHES
CONTROL
LOGIC
AD8152
VEE
GENERAL DESCRIPTION
AD8152 is a member of the Xstream line of products and is a
breakthrough in digital switching, offering a large switch array
(34 × 34) on very little power, typically 2.0 W. Additionally, it
operates at data rates up to 3.2 Gbps per port, making it suitable
for Sonet/SDH OC-48 with Forward Error Correction (FEC).
The AD8152’s useful supply voltage range allows the user to
operate at LVPECL/CML data levels down to 2.5 V. The control
interface is LVTTL or LVCMOS compatible on 2.5 V to 3.3 V.
The AD8152’s fully differential signal path reduces jitter and
crosstalk while allowing the use of smaller single-ended voltage
swings. It is offered in a 256-ball SBGA package that operates
over the industrial temperature range of 0°C to 85°C.
80ps/DIV
Figure 1. Eye Pattern, 3.2 Gbps, PRBS 23
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved.
1 page  
AD8152
BALL GRID DESCRIPTIONS
Ball Mnemonic Type Description
A1 VEE
Power Negative Supply
A2 VEE
Power Negative Supply
A3 VEE
Power Negative Supply
A4 VCC
Power Positive Supply
A5 VTTO Power Output Termination Supply
A6 OUT02P I/O
High Speed Output
A7 VTTO Power Output Termination Supply
A8 OUT05P I/O
High Speed Output
A9 VTTO Power Output Termination Supply
A10 OUT08P I/O
High Speed Output
A11 VCC
Power Positive Supply
A12 OUT11P I/O
High Speed Output
A13 VTTO Power Output Termination Supply
A14 OUT14P I/O
High Speed Output
A15 VTTO Power Output Termination Supply
A16 VCC
Power Positive Supply
A17 VEE
Power Negative Supply
A18 VEE
Power Negative Supply
A19 VEE
Power Negative Supply
A20 VEE
Power Negative Supply
B1 VEE
Power Negative Supply
B2 VEE
Power Negative Supply
B3 VEE
Power Negative Supply
B4 VCC
Power Positive Supply
B5 VTTO Power Output Termination Supply
B6 OUT02N I/O
High Speed Output Complement
B7 VTTO Power Output Termination Supply
B8 OUT05N I/O
High Speed Output Complement
B9 VTTO Power Output Termination Supply
B10 OUT08N I/O
High Speed Output Complement
B11 VCC
Power Positive Supply
B12 OUT11N I/O
High Speed Output Complement
B13 VTTO Power Output Termination Supply
B14 OUT14N I/O
High Speed Output Complement
B15 VTTO Power Output Termination Supply
B16 VCC
Power Positive Supply
B17 VEE
Power Negative Supply
B18 VEE
Power Negative Supply
B19 VEE
Power Negative Supply
B20 VEE
Power Negative Supply
C1 VEE
Power Negative Supply
C2 VEE
Power Negative Supply
C3 A5
Control Output Address Pin (MSB)
C4 A6
Control Output Address Pin (Bank Des.)
C5 OUT00P I/O
High Speed Output
C6 OUT01N I/O
High Speed Output Complement
C7 OUT03P I/O
High Speed Output
C8 OUT04N I/O
High Speed Output Complement
C9 OUT06P I/O
High Speed Output
C10 OUT07N I/O
High Speed Output Complement
C11 OUT09P I/O
High Speed Output
Ball Mnemonic Type Description
C12 OUT10N I/O
High Speed Output Complement
C13 OUT12P I/O
High Speed Output
C14 OUT13N I/O
High Speed Output Complement
C15 OUT15P I/O
High Speed Output
C16 OUT16N I/O
High Speed Output Complement
C17 D5
Control Input Address Pin (MSB)
C18 D4
Control Input Address Pin
C19 VEE
Power Negative Supply
C20 VEE
Power Negative Supply
D1 A1
Control Output Address Pin
D2 A2
Control Output Address Pin
D3 A3
Control Output Address Pin
D4 A4
Control Output Address Pin
D5 OUT00N I/O
High Speed Output Complement
D6 OUT01P I/O
High Speed Output
D7 OUT03N I/O
High Speed Output Complement
D8 OUT04P I/O
High Speed Output
D9 OUT06N I/O
High Speed Output Complement
D10 OUT07P I/O
High Speed Output
D11 OUT09N I/O
High Speed Output Complement
D12 OUT10P I/O
High Speed Output
D13 OUT12N I/O
High Speed Output Complement
D14 OUT13P I/O
High Speed Output
D15 OUT15N I/O
High Speed Output Complement
D16 OUT16P I/O
High Speed Output
D17 D3
Control Input Address Pin
D18 D2
Control Input Address Pin
D19 D1
Control Input Address Pin
D20 D0
Control Input Address Pin (LSB)
E1 A0
Control Output Address Pin (LSB)
E2 UPDATE Control Second Rank Write Enable
E3 N/C Reserved
Do Not Connect
E4 N/C Reserved
Do Not Connect
E17 N/C Reserved
Do Not Connect
E18 N/C Reserved
Do Not Connect
E19 RESET
Control Reset/Disable Outputs
E20 CS
Control Chip Select Enable
F1 VCC
F2 WE
Power Positive Supply
Control First Rank Write Enable
F3 IN00P
I/O High Speed Input
F4 IN00N
I/O High Speed Input Complement
F17 IN17N
I/O High Speed Input Complement
F18 IN17P
F19 RE
I/O High Speed Input
Control Readback Enable
F20 VCC
Power Positive Supply
G1 IN02P
I/O High Speed Input
G2 IN02N
I/O High Speed Input Complement
G3 IN01N
I/O High Speed Input Complement
G4 IN01P
I/O High Speed Input
G17 IN18P
I/O High Speed Input
G18 IN18N
I/O High Speed Input Complement
REV. A
–5–
5 Page 
160
BIN WIDTH = 5ps
140
120
100
80
60
40
20
0
600
625 650 675 700
PROPAGATION DELAY – ps
725
750
TPC 19. Variation in Propagation Delay
800
780
760
740
720
700
680
660
640
620
6000 10 20 30 40 50 60 70 80 90
TEMPERATURE – ؇C
TPC 20. Propagation Delay vs. Temperature
AD8152
750
725
700
675
650
625
600
2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6
SUPPLY VOLTAGE – V
TPC 21. Propagation Delay vs. Supply
3.8
34
32
30
28
26
24
MEASURED
22
20
18
IDEAL
16
14
12
10
8
6
4
2
0
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
IOUT CODE
TPC 22. IOUT vs. IOUT Code
REV. A
–11–
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet AD8152.PDF ] | |
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