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PDF PI2EQX4401 Data sheet ( Hoja de datos )
| Número de pieza | PI2EQX4401 | |
| Descripción | 2.5Gbps x1 Lane Serial PCI Express Repeater/Equalizer | |
| Fabricantes | Pericom Semiconductor | |
| Logotipo |  |
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Features
• One high-speed PCI Express lane
• Adjustable Transmiter De-Emphasis & Amplitude
• Adjustable Receiver Equalization
• One Spread Spectrum Reference Clock Buffer Output
• 100Ω Differential CML I/O’s
• Low Power (100mW per Channel)
• Stand-by Mode – Power Down State
• VCC Operating Range: 1.8V ±0.1V
• Built in Clock Buffer
• Packaging (Pb-free & Green):
— 36-pad TQFN (ZF36)
Block Diagram
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PI2EQX4401
2.5Gbps x1 Lane Serial PCI Express
Repeater/Equalizer with Clock Buffer
Description
Pericom Semiconductor’s PI2EQX4401 is a low power, PCI-
Express compliant signal re-driver. The device provides
programmable equalization, amplification, and de-emphasis
by using 4 select bits, SEL[0:3], to optimize performance
over a variety of physical mediums by reducing Inter-symbol
interference. PI2EQX4401 supports two 100 Differential CML
data I/O’s between the Protocol ASIC to a switch fabric, across
a backplane, or extends the signals across other distant data
pathways on the user’s platform.
The integrated equalization circuitry provides flexibility with
signal integrity of the PCI Express signal before the re-driver.
Whereas the integrated de-emphasis circuitry provides flexibility
with signal integrity of the PCI Express signal after the re-driver.
In addition to providing signal re-conditioning, Pericom’s
PI2EQX4401 also provides power management Stand-by mode
operated by a Bus Enable pin.
Pin Description
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36 35 34 33 32 31 30 29
VDD 1
28 VDD
AI+ 2
27 A0+
AI-
GND
3
4
26 A0-
25 GND
AVDD
VDD
B0+
B0-
5
6
7
8
GND
24 AGND
23 VDD
22 BI+
21 BI-
GND 9
20 GND
VDD 10
19 IREF
11 12 13 14 15 16 17 18
1
PS8777B
02/15/06
1 page  
PI2EQX4401
2.5Gbps x1 Lane Serial PCI Express
Repeater/Equalizer with Clock Buffer
AC/DC Electrical Characteristics (TA = 0 to 70˚C)
Symbol
Parameter
Conditions
Min. Typ. Max. Units
CML Transmitter Output (100Ω differential)
VDIFFP
Output Voltage Swing
Differential Swing
| VTX-D+ - VTX-D- |
VTX-C
tF, tR
ZOUT
ZTX-DIFF-DC
CTX
VTX-DIFFP-P
Common-Mode Voltage
Transition Time
Output resistance
DC Differential TX Impedance
AC Coupling Capacitor
Differential Peak-to-peak Ouput
Voltage
| VTX-D+ + VTX-D- | / 2
20% to 80% (1)
Single ended
VTX-DIFFP-P = 2 * | VTX-D+ - VTX-D- |
400
40
80
75
0.8
VCC-
0.3
50
100
900 mVp-p
150 ps
60 Ω
120 Ω
200 nF
1.8 V
LVCMOS Control Pins
VIH Input High Voltage
VIL Input Low Voltage
IIH Input High Current
IIL Input Low Current
0.65 ×
VDD
0.35 ×
VDD
250
500
V
µA
Note:
1. Using K28.7 (0011111000) pattern)
5
PS8777B
02/15/06
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet PI2EQX4401.PDF ] | |
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