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X9241A 반도체 회로 부품 판매점

Quad Digital Controlled Potentionmeters



Intersil Corporation 로고
Intersil Corporation
X9241A 데이터시트, 핀배열, 회로
X9241A
®
Quad Digital Controlled Potentionmeters (XDCP™)
Data Sheet
December 14, 2006
FN8164.5
Non-Volatile/Low Power/2-Wire/64 Taps
The X9241A integrates four digitally controlled
potentiometers (XDCP) on a monolithic CMOS integrated
microcircuit.
The digitally controlled potentiometer is implemented using
63 resistive elements in a series array. Between each
element are tap points connected to the wiper terminal
through switches. The position of the wiper on the array is
controlled by the user through the 2-wire bus interface. Each
potentiometer has associated with it a volatile Wiper Counter
Register (WCR) and 4 nonvolatile Data Registers
(DR0:DR3) that can be directly written to and read by the
user. The contents of the WCR controls the position of the
wiper on the resistor array through the switches. Power up
recalls the contents of DR0 to the WCR.
The XDCP can be used as a three-terminal potentiometer or
as a two-terminal variable resistor in a wide variety of
applications including control, parameter adjustments, and
signal processing.
www.DataSheet4U.com
Block Diagram
Features
• Four potentiometers in one package
• 2-wire serial interface
• Register oriented format
- Direct read/write/transfer of wiper positions
- Store as many as four positions per potentiometer
• Terminal Voltages: +5V, -3.0V
• Cascade resistor arrays
• Low power CMOS
• High Reliability
- Endurance–100,000 data changes per bit per register
- Register data retention–100 years
• 16-bytes of nonvolatile memory
• 3 resistor array values
- 2kΩ, 10kΩ, 50kΩ or combination
- Cascadable for values of 4kΩ to 200kΩ
• Resolution: 64 taps each pot
• 20 Ld plastic DIP, 20 Ld TSSOP and 20 Ld SOIC
packages
• Pb-free plus anneal available (RoHS compliant)
VCC
VSS
SCL
SDA
A0
A1
A2
A3
Interface
and
Control
Circuitry
8
Data
R0 R1
R2 R3
Wiper
Counter
Register
(WCR)
VH0/RH0
VL0/RL0
VW0/RW0
R0 R1
R2 R3
Wiper
Counter
Register
(WCR)
Register
Array
Pot 2
VH2/
RH2
VL2/RL2
VW2/RW2
R0 R1
R2 R3
Wiper
Counter
Register
(WCR)
Register
Array
Pot 1
VH1/RH1
VL1/RL1
VW1/RW1
R0 R1
R2 R3
Wiper
Counter
Register
(WCR)
Register
Array
Pot 3
VH3/RH3
VL3/RL3
VW3/RW3
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005, 2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.


X9241A 데이터시트, 핀배열, 회로
X9241A
Ordering Information
PART NUMBER
X9241AMP
X9241AMPZ (Note)
X9241AMPI
X9241AMPIZ (Note)
X9241AMS*
X9241AMSZ* (Note)
X9241AMSI*, **
X9241AMSIZ* (Note)
X9241AMV*
X9241AMVZ* (Note)
X9241AMVI*, **
X9241AMVIZ* (Note)
X9241AWP
X9241AWPI
X9241AWPIZ (Note)
X9241AWS*, **
X9241AWSZ*, ** (Note)
X9241AWSI*
X9241AWSIZ* (Note)
X9241AWV*, **
X9241AWVZ* (Note)
X9241AWVI*, **
X9241AWVIZ*, ** (Note)
X9241AYP
X9241AYPZ (Note)
X9241AYPI
X9241AYPIZ (Note)
X9241AYS*
X9241AYSZ* (Note)
X9241AYSI*
X9241AYSIZ* (Note)
X9241AYV*, **
X9241AYVZ* (Note)
X9241AYVI*, **
X9241AYVIZ* (Note)
PART MARKING
X9241AMP
X9241AMPZ
X9241AMPI
X9241AMPIZ
X9241AMS
X9241AMS Z
X9241AMSI
X9241AMSI Z
X9241AMV
X9241AMV Z
X9241AMVI
X9241AMVI Z
X9241AWP
X9241AWPI
X9241AWPI Z
X9241AWS
X9241AWS Z
X9241AWSI
X9241AWSI Z
X9241AWV
X9241AWVZ
X9241AWVI
X9241AWVI Z
X9241AYP
X9241AYP Z
X9241AYPI
X9241AYPI Z
X9241AYS
X9241AYS Z
X9241AYSI
X9241AYSI Z
X9241AYV
X9241AYV Z
X9241AYVI
X9241AYVI Z
VCC LIMITS
(V)
5 ±10%
POTENTIOMETER
ORGANIZATION
(k)
2/10/50
Pot 0 = 2k
Pot 1 = 10k
Pot 2 = 10k
Pot 3 = 50k
10
Pot 0 = 10k
Pot 1 = 10k
Pot 2 = 10k
Pot 3 = 10k
2
Pot 0 = 2k
Pot 1 = 2k
Pot 2 = 2k
Pot 3 = 2k
TEMP RANGE
(°C)
0 to +70
0 to +70
-40 to +85
-40 to +85
0 to +70
0 to +70
-40 to +85
-40 to +85
0 to +70
0 to +70
-40 to +85
-40 to +85
0 to +70
-40 to +85
-40 to +85
0 to +70
0 to +70
-40 to +85
-40 to +85
0 to +70
0 to +70
-40 to +85
-40 to +85
0 to +70
0 to +70
-40 to +85
-40 to +85
0 to +70
0 to +70
-40 to +85
-40 to +85
0 to +70
0 to +70
-40 to +85
-40 to +85
PACKAGE
20 Ld PDIP
20 Ld PDIP*** (Pb-free)
20 Ld PDIP
20 Ld PDIP*** (Pb-free)
20 Ld SOIC
20 Ld SOIC (Pb-free)
20 Ld SOIC
20 Ld SOIC (Pb-free)
20 Ld TSSOP
20 Ld TSSOP (Pb-free)
20 Ld TSSOP
20 Ld TSSOP (Pb-free)
20 Ld PDIP
20 Ld PDIP
20 Ld PDIP*** (Pb-free)
20 Ld SOIC
20 Ld SOIC (Pb-free)
20 Ld SOIC
20 Ld SOIC (Pb-free)
20 Ld TSSOP
20 Ld TSSOP (Pb-free)
20 Ld TSSOP
20 Ld TSSOP (Pb-free)
20 Ld PDIP
20 Ld PDIP*** (Pb-free)
20 Ld PDIP
20 Ld PDIP*** (Pb-free)
20 Ld SOIC
20 Ld SOIC (Pb-free)
20 Ld SOIC
20 Ld SOIC (Pb-free)
20 Ld TSSOP
20 Ld TSSOP (Pb-free)
20 Ld TSSOP
20 Ld TSSOP (Pb-free)
2 FN8164.5
December 14, 2006




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